soc/intel/common: Simply code accessing scaling factors
[coreboot.git] / src / mainboard / google / fatcat / mainboard.c
blobf514eb96d14655b936e3067200e1cbe537877156
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <acpi/acpi.h>
4 #include <acpi/acpigen.h>
5 #include <baseboard/gpio.h>
6 #include <baseboard/variants.h>
7 #include <device/device.h>
8 #include <ec/ec.h>
9 #include <soc/ramstage.h>
10 #include <stdlib.h>
11 #include <vendorcode/google/chromeos/chromeos.h>
13 void __weak fw_config_gpio_padbased_override(struct pad_config *padbased_table)
15 /* default implementation does nothing */
18 void mainboard_update_soc_chip_config(struct soc_intel_pantherlake_config *config)
20 variant_update_soc_chip_config(config);
23 void __weak variant_update_soc_chip_config(struct soc_intel_pantherlake_config *config)
25 /* default implementation does nothing */
28 static void mainboard_init(void *chip_info)
30 struct pad_config *padbased_table;
31 const struct pad_config *base_pads;
32 size_t base_num;
34 padbased_table = new_padbased_table();
35 base_pads = variant_gpio_table(&base_num);
36 gpio_padbased_override(padbased_table, base_pads, base_num);
37 fw_config_gpio_padbased_override(padbased_table);
38 gpio_configure_pads_with_padbased(padbased_table);
39 free(padbased_table);
40 baseboard_devtree_update();
43 void __weak baseboard_devtree_update(void)
45 /* Override dev tree settings per baseboard */
48 void __weak variant_generate_s0ix_hook(enum s0ix_entry entry)
50 /* Add board-specific MS0X entries */
52 if (s0ix_entry == S0IX_ENTRY) {
53 implement variant operations here
55 if (s0ix_entry == S0IX_EXIT) {
56 implement variant operations here
61 static void mainboard_dev_init(struct device *dev)
63 mainboard_ec_init();
66 static void mainboard_enable(struct device *dev)
68 dev->ops->init = mainboard_dev_init;
71 struct chip_operations mainboard_ops = {
72 .init = mainboard_init,
73 .enable_dev = mainboard_enable,