7 option STORAGE_UNKNOWN
0
8 option STORAGE_NVME_GEN4
1
9 option STORAGE_NVME_GEN5
2
14 chip soc
/intel
/pantherlake
16 register
"power_limits_config[PTL_U_1_CORE]" = "{
17 .tdp_pl1_override = 15,
18 .tdp_pl2_override = 25,
21 register
"power_limits_config[PTL_H_1_CORE]" = "{
22 .tdp_pl1_override = 25,
23 .tdp_pl2_override = 25,
26 register
"power_limits_config[PTL_H_2_CORE]" = "{
27 .tdp_pl1_override = 25,
28 .tdp_pl2_override = 25,
31 register
"usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
32 register
"usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
33 register
"usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" #
Type-A Port A0 # USB HUB
(USB2 Camera
)
34 register
"usb2_ports[5]" = "USB2_PORT_MID(OC3)" #
Type-A Port A1
/
35 register
"usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # CNVi BT
or discrete BT
37 register
"usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3.2 x1
Type-A Con #
2 /
40 register
"pmc_gpe0_dw0" = "GPP_A"
41 register
"pmc_gpe0_dw1" = "GPP_D"
42 register
"pmc_gpe0_dw2" = "GPP_F"
45 register
"ddi_port_A_config" = "1"
46 register
"ddi_ports_config" = "{
47 [DDI_PORT_A] = DDI_ENABLE_HPD,
50 # Intel Common SoC Config
51 #
+-------------------+---------------------------+
53 #
+-------------------+---------------------------+
56 #
+-------------------+---------------------------+
57 register
"common_soc_config" = "{
60 .speed = I2C_SPEED_FAST,
63 .speed = I2C_SPEED_FAST,
69 device ref igpu on
end
72 device ref iaa off
end
74 device ref tcss_xhci on
76 device ref tcss_root_hub on
78 register
"desc" = ""USB3
Type-C Port C2
""
79 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
80 register
"group" = "ACPI_PLD_GROUP(2, 2)"
81 device ref tcss_usb3_port2 on
end
84 register
"desc" = ""USB3
Type-C Port C3
""
85 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
86 register
"group" = "ACPI_PLD_GROUP(1, 2)"
87 device ref tcss_usb3_port3 on
end
95 device ref xhci_root_hub on
97 register
"desc" = ""USB2
Type-C Port C0
""
98 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
99 register
"group" = "ACPI_PLD_GROUP(4, 2)"
100 device ref usb2_port1 on
end
102 chip drivers
/usb
/acpi
103 register
"desc" = ""USB2
Type-C Port C1
""
104 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
105 register
"group" = "ACPI_PLD_GROUP(3, 2)"
106 device ref usb2_port2 on
end
108 chip drivers
/usb
/acpi
109 register
"desc" = ""USB2 Camera
""
110 register
"type" = "UPC_TYPE_INTERNAL"
111 register
"group" = "ACPI_PLD_GROUP(5, 1)"
112 device ref usb2_port5 on
end
114 chip drivers
/usb
/acpi
115 register
"desc" = ""USB2
Type-A Port
1""
116 register
"type" = "UPC_TYPE_A"
117 register
"group" = "ACPI_PLD_GROUP(1, 1)"
118 device ref usb2_port6 on
end
120 chip drivers
/usb
/acpi
121 register
"desc" = ""USB2 Bluetooth
""
122 register
"type" = "UPC_TYPE_INTERNAL"
123 register
"reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A16)"
124 device ref usb2_port8 on
end
126 chip drivers
/usb
/acpi
127 register
"desc" = ""USB3
Type-A Port
1""
128 register
"type" = "UPC_TYPE_USB3_A"
129 register
"group" = "ACPI_PLD_GROUP(1, 2)"
130 device ref usb3_port2 on
end
136 device ref tcss_dma1 on
137 chip drivers
/intel
/usb4
/retimer
138 use tcss_usb3_port2
as dfp
[0].typec_port
139 device generic
0 on
end
141 chip drivers
/intel
/usb4
/retimer
142 use tcss_usb3_port3
as dfp
[1].typec_port
143 device generic
0 on
end
147 device ref pcie_rp1 on
148 # Enable PCH PCIE x1 slot using CLK
2
149 register
"pcie_rp[PCIE_RP(3)]" = "{
152 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,
154 chip soc
/intel
/common
/block
/pcie
/rtd3
155 register
"srcclk_pin" = "2"
156 device generic
0 on
end
160 device ref pcie_rp3 on
161 register
"pcie_rp[PCH_RP(4)]" = "{
164 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,
166 chip soc
/intel
/common
/block
/pcie
/rtd3
167 register
"reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)"
168 register
"srcclk_pin" = "4"
169 device pci
00.0 on
end
171 chip drivers
/wifi
/generic
172 register
"add_acpi_dma_property" = "true"
173 register
"wake" = "GPE0_DW0_12" # GPP_A12
174 use usb2_port7
as bluetooth_companion
175 device pci
00.0 on
end
179 device ref pcie_rp9 on
180 register
"pcie_rp[PCIE_RP(9)]" = "{
183 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,
185 chip soc
/intel
/common
/block
/pcie
/rtd3
186 register
"is_storage" = "true"
187 register
"srcclk_pin" = "1"
188 device generic
0 on
end
193 chip drivers
/intel
/soundwire
195 chip drivers
/soundwire
/alc711
196 # SoundWire Link
3 ID
1
197 register
"desc" = ""Headset Codec
""
198 device generic
3.1 on
205 device ref cnvi_wifi on
206 chip drivers
/wifi
/generic
207 register
"wake" = "GPE0_PME_B0"
208 register
"add_acpi_dma_property" = "true"
209 register
"enable_cnvi_ddr_rfim" = "true"
210 device generic
0 on
end
214 device ref i2c0 on
end
218 register
"hid" = ""GOOG0005
""
219 register
"irq" = "ACPI_IRQ_EDGE_LOW(GPP_F15_IRQ)"
226 register
"generic.hid" = ""P3840
""
227 register
"generic.desc" = ""Synaptics TOUCHPAD
""
228 register
"generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E18_IRQ)"
229 register
"generic.uid" = "5"
230 register
"generic.detect" = "1"
231 register
"hid_desc_reg_offset" = "0x20"