device/pci_ids: Add Intel Panther Lake device IDs for Bluetooth CNVi
[coreboot.git] / src / mainboard / google / fatcat / variants / francka / overridetree.cb
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1 fw_config
2 field PDC_CONTROL 0 1
3 option PDC_RTS 0
4 option PDC_TI 1
5 end
6 field AUDIO 3 5
7 option AUDIO_ALC256M_CG_HDA 0
8 option AUDIO_ALC721_SNDW 1
9 option AUDIO_CS42L43_CS35L56_SNDW 2
10 option AUDIO_ALC722_ALC1320_SNDW 3
11 end
12 field BRIDGE 6 7
13 option BRIDGE_HAYDEN 0
14 option BRIDGE_BARLOW 1
15 option BRIDGE_GOTHIC 2
16 end
17 field WWAN 8
18 option WWAN_PRESENT 0
19 option WWAN_ABSENT 1
20 end
21 end
23 chip soc/intel/pantherlake
24 # GPE configuration
25 register "pmc_gpe0_dw0" = "GPP_H"
26 register "pmc_gpe0_dw1" = "GPP_D"
27 register "pmc_gpe0_dw2" = "GPP_E"
29 register "max_dram_speed_mts" = "7467"
31 register "usb2_ports[1]" = "USB2_PORT_MID(OC0)" # Type-A Port A0
32 register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
33 register "usb2_ports[4]" = "USB2_PORT_MID(OC0)" # Type-A Port A1
34 register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
35 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # USB HUB (USB2 Camera)
36 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # CNVi BT or discrete BT
38 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # USB3.2 x1 Type-A Con #0
39 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # USB3.2 x1 Type-A Con #1
41 register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
42 register "tcss_ports[3]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
44 register "tcss_cap_policy[2]" = "TCSS_TYPE_C_PORT_FULL_FUN"
45 register "tcss_cap_policy[3]" = "TCSS_TYPE_C_PORT_FULL_FUN"
47 # Enable EDP in PortA
48 register "ddi_port_A_config" = "1"
49 register "ddi_ports_config" = "{
50 [DDI_PORT_A] = DDI_ENABLE_HPD,
53 # TCSS USB3
54 register "tcss_aux_ori" = "1"
56 register "serial_io_i2c_mode" = "{
57 [PchSerialIoIndexI2C0] = PchSerialIoPci,
58 [PchSerialIoIndexI2C1] = PchSerialIoPci,
59 [PchSerialIoIndexI2C4] = PchSerialIoPci,
62 # Intel Common SoC Config
63 #+-------------------+---------------------------+
64 #| Field | Value |
65 #+-------------------+---------------------------+
66 #| I2C1 | TPM(TI50) Early init is |
67 #| | required to set up a BAR |
68 #| | for TPM communication |
69 #| I2C4 | Touchscreen, Touchpad |
70 #+-------------------+---------------------------+
71 register "common_soc_config" = "{
72 .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
73 .i2c[1] = {
74 .early_init = 1,
75 .speed = I2C_SPEED_FAST,
77 .i2c[4] = {
78 .speed = I2C_SPEED_FAST,
82 device domain 0 on
83 device ref igpu on end
85 device ref iaa off end
87 device ref tbt_pcie_rp0 on end
88 device ref tbt_pcie_rp2 on end
89 device ref tbt_pcie_rp3 on end
90 device ref tcss_xhci on
91 chip drivers/usb/acpi
92 device ref tcss_root_hub on
93 chip drivers/usb/acpi
94 register "desc" = ""USB3 Type-C Port C0""
95 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
96 register "group" = "ACPI_PLD_GROUP(3, 2)"
97 device ref tcss_usb3_port2 on end
98 end
99 chip drivers/usb/acpi
100 register "desc" = ""USB3 Type-C Port C1""
101 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
102 register "group" = "ACPI_PLD_GROUP(4, 2)"
103 device ref tcss_usb3_port3 on end
109 device ref tcss_dma1 on
110 chip drivers/intel/usb4/retimer
111 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
112 use tcss_usb3_port2 as dfp[0].typec_port
113 device generic 0 on end
115 chip drivers/intel/usb4/retimer
116 register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
117 use tcss_usb3_port3 as dfp[1].typec_port
118 device generic 0 on end
122 device ref xhci on
123 chip drivers/usb/acpi
124 device ref xhci_root_hub on
125 chip drivers/usb/acpi
126 register "desc" = ""USB2 Type-A Port 0""
127 register "type" = "UPC_TYPE_A"
128 register "group" = "ACPI_PLD_GROUP(1, 1)"
129 device ref usb2_port2 on end
131 chip drivers/usb/acpi
132 register "desc" = ""USB2 Type-C Port C0""
133 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
134 register "group" = "ACPI_PLD_GROUP(3, 1)"
135 device ref usb2_port4 on end
137 chip drivers/usb/acpi
138 register "desc" = ""USB2 Type-A Port 1""
139 register "type" = "UPC_TYPE_A"
140 register "group" = "ACPI_PLD_GROUP(2, 1)"
141 device ref usb2_port5 on end
143 chip drivers/usb/acpi
144 register "desc" = ""USB2 Type-C Port C1""
145 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
146 register "group" = "ACPI_PLD_GROUP(4, 1)"
147 device ref usb2_port6 on end
149 chip drivers/usb/acpi
150 register "desc" = ""USB2 Camera""
151 register "type" = "UPC_TYPE_INTERNAL"
152 register "group" = "ACPI_PLD_GROUP(5, 1)"
153 device ref usb2_port7 on end
155 chip drivers/usb/acpi
156 register "desc" = ""USB2 Bluetooth""
157 register "type" = "UPC_TYPE_INTERNAL"
158 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A16)"
159 device ref usb2_port8 on end
161 chip drivers/usb/acpi
162 register "desc" = ""USB3 Type-A Port 0""
163 register "type" = "UPC_TYPE_USB3_A"
164 register "group" = "ACPI_PLD_GROUP(1, 2)"
165 device ref usb3_port1 on end
167 chip drivers/usb/acpi
168 register "desc" = ""USB3 Type-A Port 1""
169 register "type" = "UPC_TYPE_USB3_A"
170 register "group" = "ACPI_PLD_GROUP(2, 2)"
171 device ref usb3_port2 on end
177 device ref cnvi_wifi on
178 chip drivers/wifi/generic
179 register "wake" = "GPE0_PME_B0"
180 register "add_acpi_dma_property" = "true"
181 register "enable_cnvi_ddr_rfim" = "true"
182 device generic 0 on end
184 end # CNVi
185 # NOTE: i2c0 is function 0; hence it needs to be enabled when any of i2c1-5 is enabled.
186 # TPM device is under i2c1. Therefore, i2c0 needs to be enabled anyways.
187 device ref i2c0 on end
188 device ref i2c1 on
189 chip drivers/i2c/tpm
190 register "hid" = ""GOOG0005""
191 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H11_IRQ)"
192 device i2c 50 on end
194 end # #I2C1
195 device ref i2c4 on
196 chip drivers/i2c/hid
197 register "generic.hid" = ""ILTK0001""
198 register "generic.desc" = ""ILITEK Touchscreen""
199 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E01_IRQ)"
200 register "generic.detect" = "1"
201 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B08)"
202 register "generic.reset_delay_ms" = "200"
203 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B18)"
204 register "generic.enable_delay_ms" = "12"
205 register "generic.has_power_resource" = "1"
206 register "hid_desc_reg_offset" = "0x01"
207 device i2c 41 on end
209 chip drivers/i2c/generic
210 register "hid" = ""ELAN0000""
211 register "desc" = ""ELAN Touchpad""
212 register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_E18_IRQ)"
213 register "wake" = "GPE0_DW2_18"
214 register "detect" = "1"
215 device i2c 15 on end
217 end # I2C4
219 device ref pcie_rp2 on
220 probe WWAN WWAN_PRESENT
221 register "pcie_rp[PCIE_RP(2)]" = "{
222 .clk_src = 5,
223 .clk_req = 5,
224 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,
226 chip soc/intel/common/block/pcie/rtd3
227 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D03)"
228 register "reset_off_delay_ms" = "20"
229 register "srcclk_pin" = "5"
230 register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
231 register "skip_on_off_support" = "true"
232 register "use_rp_mutex" = "true"
233 device generic 0 alias rp2_rtd3 on end
235 chip drivers/wwan/fm
236 register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A09)"
237 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B20)"
238 register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D03)"
239 register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E02)"
240 register "add_acpi_dma_property" = "true"
241 use rp2_rtd3 as rtd3dev
242 device generic 0 on end
244 end # WWAN
245 device ref pcie_rp3 on
246 # Enable PCH PCIE x1 slot using CLK 2
247 register "pcie_rp[PCIE_RP(3)]" = "{
248 .clk_src = 2,
249 .clk_req = 2,
250 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,
252 chip soc/intel/common/block/pcie/rtd3
253 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A08)"
254 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D19)"
255 register "srcclk_pin" = "2"
256 device generic 0 on end
258 end # SD Card
259 device ref pcie_rp9 on
260 register "pcie_rp[PCIE_RP(9)]" = "{
261 .clk_src = 1,
262 .clk_req = 1,
263 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,
265 chip soc/intel/common/block/pcie/rtd3
266 register "is_storage" = "true"
267 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B16)"
268 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E03)"
269 register "srcclk_pin" = "1"
270 device generic 0 on end
272 end # M.2 SSD
274 device ref smbus on end
275 device ref npk on end
276 device ref hda on
277 chip drivers/sof
278 register "spkr_tplg" = "max98360a"
279 register "jack_tplg" = "rt5682"
280 register "mic_tplg" = "_2ch_pdm0"
281 device generic 0 on
282 probe AUDIO AUDIO_ALC256M_CG_HDA
286 device ref gspi1 on
287 chip drivers/spi/acpi
288 register "name" = ""CRFP""
289 register "hid" = "ACPI_DT_NAMESPACE_HID"
290 register "uid" = "1"
291 register "compat_string" = ""google,cros-ec-spi""
292 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F18_IRQ)"
293 register "wake" = "GPE0_DW2_15"
294 register "has_power_resource" = "true"
295 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F16)"
296 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H03)"
297 register "enable_delay_ms" = "3"
298 device spi 0 hidden end
299 end # FPMCU