src/mainboard/google/glados/variants/asuka/variant.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <stdint.h>
   4 #include <string.h>
   5 #include <baseboard/variant.h>
   6 #include <fsp/soc_binding.h>
   7 #include <soc/romstage.h>
   8
   9 void variant_memory_init_params(FSPM_UPD *mupd, const int spd_index)
  10 {
  11         FSP_M_CONFIG *mem_cfg;
  12         mem_cfg = &mupd->FspmConfig;
  13
  14         /* DQ byte map */
  15         const u8 dq_map[2][12] = {
  16                 { 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0,
  17                   0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 },
  18                 { 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0,
  19                   0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 } };
  20         /* DQS CPU<>DRAM map */
  21         const u8 dqs_map[2][8] = {
  22                 { 0, 1, 3, 2, 6, 5, 4, 7 },
  23                 { 2, 3, 0, 1, 6, 7, 4, 5 } };
  24
  25         /* Rcomp resistor */
  26         const u16 RcompResistor[3] = { 200, 81, 162 };
  27
  28         /* Rcomp target */
  29         const u16 RcompTarget[5] = { 100, 40, 40, 23, 40 };
  30
  31         memcpy(mem_cfg->DqByteMapCh0, dq_map[0], sizeof(mem_cfg->DqByteMapCh0));
  32         memcpy(mem_cfg->DqByteMapCh1, dq_map[1], sizeof(mem_cfg->DqByteMapCh1));
  33         memcpy(mem_cfg->DqsMapCpu2DramCh0, dqs_map[0], sizeof(mem_cfg->DqsMapCpu2DramCh0));
  34         memcpy(mem_cfg->DqsMapCpu2DramCh1, dqs_map[1], sizeof(mem_cfg->DqsMapCpu2DramCh1));
  35         memcpy(mem_cfg->RcompResistor, RcompResistor, sizeof(mem_cfg->RcompResistor));
  36         memcpy(mem_cfg->RcompTarget, RcompTarget, sizeof(mem_cfg->RcompTarget));
  37 }
  38
  39 int is_dual_channel(const int spd_index)
  40 {
  41         /* Per Makefile.mk, dual channel indices 1,3,5 */
  42         return (spd_index & 0x1);
  43 }