soc/intel/common: Simply code accessing scaling factors
[coreboot.git] / src / mainboard / google / kukui / sdram_configs.c
blob274dcf124d8e7c35f65f7fe8718c21d49135d66a
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <boardid.h>
4 #include <cbfs.h>
5 #include <console/console.h>
6 #include <soc/emi.h>
8 /*
9 * The RAM_CODE ADC on Kukui can support only 12 different levels. Each model
10 * can create its own mapping if needed, with an offset (0x10, 0x20, ...,
11 * defined as CONFIG_BOARD_SDRAM_TABLE_OFFSET) applied in ram_code().
13 static const char *const sdram_configs[] = {
14 /* Standard table. */
15 [0x00] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
16 [0x01] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
17 [0x02] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
18 [0x03] = "sdram-lpddr4x-KMDH6001DA-B422-4GB",
19 [0x04] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
20 [0x05] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB",
21 [0x06] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
22 [0x07] = "sdram-lpddr4x-SDADA4CR-128G-4GB",
23 [0x08] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
24 [0x09] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
25 [0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
26 [0x0b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB",
28 /* Table shared by Fennel, Cerise, Stern, Makomo, Munna, offset = 0x10 */
29 [0x10] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
30 [0x11] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
31 [0x12] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
32 [0x13] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
33 [0x14] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
34 [0x15] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
35 [0x16] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
36 [0x17] = "sdram-lpddr4x-MT53E1G32D2NP-046-4GB",
37 [0x18] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
38 [0x19] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
39 [0x1a] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
40 [0x1b] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
42 /* Table shared by Kakadu and its variants, offset = 0x20 */
43 [0x20] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
44 [0x21] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
45 [0x22] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
46 [0x23] = "sdram-lpddr4x-KMDH6001DA-B422-4GB",
47 [0x24] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
48 [0x25] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB",
49 [0x26] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
50 [0x27] = "sdram-lpddr4x-SDADA4CR-128G-4GB",
51 [0x28] = "sdram-lpddr4x-MT29VZZZCD9GQKPR-046-8GB",
52 [0x29] = "sdram-lpddr4x-FEPRF6432-58A1930-4GB",
54 /* Table shared by Cozmo and its variants, offset = 0x30 */
55 [0x30] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
56 [0x31] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
57 [0x32] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
58 [0x33] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
59 [0x34] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
60 [0x38] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
61 [0x39] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
62 [0x3a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
63 [0x3b] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
65 /* Table shared by Kappa and its variants, offset = 0x40 */
66 [0x40] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
67 [0x41] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
68 [0x42] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
69 [0x43] = "sdram-lpddr4x-MT53E1G32D2NP-046-4GB",
70 [0x44] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
71 [0x45] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
72 [0x46] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
73 [0x48] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
74 [0x49] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
75 [0x4a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
76 [0x4b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB",
78 /* Table shared by Burnet and Esche, offset = 0x50 */
79 [0x50] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
80 [0x51] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
81 [0x52] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
82 [0x53] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
83 [0x54] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
84 [0x55] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
85 [0x56] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
86 [0x57] = "sdram-lpddr4x-MT53E1G32D2NP-046-4GB",
87 [0x58] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
88 [0x59] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
89 [0x5a] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
90 [0x5b] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
93 static struct sdram_params params;
95 const struct sdram_params *get_sdram_config(void)
97 uint32_t ramcode = ram_code();
98 const char *name = NULL;
100 if (ramcode < ARRAY_SIZE(sdram_configs))
101 name = sdram_configs[ramcode];
103 if (!name || cbfs_load(name, &params, sizeof(params)) != sizeof(params))
104 die("Cannot load SDRAM parameter file for RAM code %#02x: %s!",
105 ramcode, name ? name : "unknown");
107 return &params;