libpayload: configs: Add new config.featuretest to broaden CI
[coreboot.git] / src / mainboard / roda / rk886ex / m3885.c
blobb54e10043a1e28afc78f03b5bf7d3d8039eaa0bd
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <types.h>
4 #include <console/console.h>
5 #include <arch/io.h>
6 #include <delay.h>
8 #include <ec/acpi/ec.h>
9 #include "m3885.h"
11 #define TH0LOW 80
12 #define TH0HIGH 85
13 #define TH0CRIT 120
14 #define TH1LOW 75
15 #define TH1HIGH 80
17 static u8 variables[] = {
18 /* Offs, AND, OR */
19 0x08, 0x48, 0x6C, /* Keyboard ScanCode Set & LED Data (kState1) */
20 0x0a, 0x01, 0x00, /* Keyboard Shift flags (kState3) */
21 0x0c, 0x80, 0x08, /* Keyboard State flags (kState5) */
22 0x11, 0xff, 0x06, /* Make/Break Debounce #'s (debounce) */
23 0x13, 0xff, 0x00, /* HotKey1 ScanCode (hotKey1) */
24 0x14, 0xff, 0x00, /* HotKey2 ScanCode (hotKey2) */
25 0x15, 0xff, 0x3f, /* HotKey3 ScanCode (hotKey3) */
26 0x16, 0xff, 0x00, /* HotKey4 ScanCode (hotKey4) */
27 0x17, 0xff, 0x00, /* HotKey5 ScanCode (hotKey5) */
28 0x18, 0xff, 0x0e, /* HotKey6 ScanCode (hotKey6) */
29 0x19, 0xff, 0x9f, /* HotKey1 Task = c5 Command Data (keyTsk1) */
30 0x1a, 0xff, 0x9f, /* HotKey2 Task = c5 Command Data (keyTsk2) */
31 0x1b, 0xff, 0x6a, /* HotKey3 Task = c5 Command Data (keyTsk3) */
32 0x1c, 0xff, 0x9f, /* HotKey4 Task = c5 Command Data (keyTsk4) */
33 0x1d, 0xff, 0x9f, /* HotKey5 Task = c5 Command Data (keyTsk5) */
34 0x1e, 0xff, 0x87, /* FuncKey Task = c5 Command Data (funcTsk) */
35 0x1f, 0xff, 0x9f, /* Delayed Task = c5 Command Data (dlyTsk1) */
36 0x20, 0xff, 0x9f, /* Wake-Up Task = c5 Command Data (wakeTsk) */
38 0x21, 0xff, 0x08, /* WigglePin Pulse Width * 2.4ms (tmPulse) */
39 0x24, 0xff, 0x30, /* Keyboard State Flags (kState7) */
41 0x2b, 0xff, 0x00,
42 0x2c, 0xff, 0x80, /* Set Fn-Key 8 */
43 0x2d, 0xff, 0x02, /* Set Fn-Key 9 */
44 0x2e, 0xff, 0x00, /* Set Fn-Key 1-8 task (0 = SMI) */
45 0x2f, 0xff, 0x00, /* Set Fn-Key 9-12 task (1 = SCI) */
48 static u8 matrix[] = {
49 0xc1,0xc0,0xd8,0xdb,0xbf,0x05,0x76,0xbf, /* (0x00-0x07) */
50 0xbf,0x80,0x78,0xbf,0xbf,0x07,0x88,0xc2, /* (0x08-0x0f) */
51 0x03,0x09,0xd9,0x16,0xbf,0x06,0x0e,0x81, /* (0x10-0x17) */
52 0xbf,0xbf,0xee,0xbf,0xbf,0x55,0x9a,0x89, /* (0x18-0x1f) */
53 0x1e,0x15,0x36,0xda,0xe8,0xbf,0x0d,0xbf, /* (0x20-0x27) */
54 0xbf,0xbf,0xbf,0xa3,0xbf,0x4e,0x66,0x8b, /* (0x28-0x2f) */
55 0x1d,0x2e,0xe6,0xe7,0xe5,0x1c,0x58,0xbf, /* (0x30-0x37) */
56 0x82,0xbf,0xf0,0xbf,0xbf,0x5b,0x5d,0x8c, /* (0x38-0x3f) */
57 0x22,0x25,0x2c,0x35,0xe1,0x1a,0x96,0xbf, /* (0x40-0x47) */
58 0xbf,0xbf,0xec,0xbf,0xbf,0x54,0xf1,0x8f, /* (0x48-0x4f) */
59 0x1b,0x2a,0x2b,0x32,0xe9,0x31,0x29,0x61, /* (0x50-0x57) */
60 0xbf,0xbf,0x8d,0xbf,0x86,0xc3,0x92,0x93, /* (0x58-0x5f) */
61 0x21,0x23,0x34,0x33,0x41,0xe0,0xbf,0xbf, /* (0x60-0x67) */
62 0xbf,0x85,0xeb,0xbf,0xb6,0xbf,0x91,0xbf, /* (0x68-0x6f) */
63 0x26,0x24,0x2d,0xe3,0xe2,0xe4,0xbf,0xbf, /* (0x70-0x77) */
64 0x87,0xbf,0xea,0xbf,0xbf,0x52,0x90,0x8e, /* (0x78-0x7f) */
67 static u8 function_ram[] = {
68 0x04,0xbd,0x0c,0xbe,0x7e,0x9a,0x8a,0xb6, /* (0xc0-0xc3) */
69 0x92,0x8f,0x93,0x8e,0x81,0x86,0x82,0x87, /* (0xc4-0xc7) */
70 0x8a,0x9a,0x8d,0x7e,0x88,0x84,0x7e,0x78, /* (0xc8-0xcb) */
71 0x77,0x07,0x77,0x98,0x89,0xb2,0x05,0x9b, /* (0xcc-0xcf) */
72 0x78,0x84,0x07,0x88,0x8a,0x7e,0x05,0xa6, /* (0xd0-0xd3) */
73 0x06,0xa7,0x04,0xa8,0x0c,0xa9,0x03,0xaa, /* (0xd4-0xd7) */
74 0x0b,0xc1,0x83,0xc0,0x0a,0xad,0x01,0xae, /* (0xd8-0xdb) */
75 0x09,0xaf,0x78,0xb0,0x07,0xb1,0x1a,0x61, /* (0xdc-0xdf) */
76 0x3b,0x69,0x42,0x72,0x4b,0x7a,0x3c,0x6b, /* (0xe0-0xe3) */
77 0x43,0x73,0x44,0x74,0x3d,0x6c,0x3e,0x75, /* (0xe4-0xe7) */
78 0x46,0x7d,0x3a,0x70,0x49,0x71,0x4a,0x94, /* (0xe8-0xeb) */
79 0x4c,0x79,0x4c,0x7c,0x45,0x7c,0x45,0x79, /* (0xec-0xef) */
80 0x4d,0x7b,0x5a,0x95,0x4c,0x7b,0x45,0x7b, /* (0xf0-0xf3) */
81 0x4d,0x79,0x4d,0x7c,0x4e,0x7b,0x54,0x95, /* (0xf4-0xf7) */
82 0x52,0x7c,0x45,0x94,0x4a,0x79,0xb3,0x95, /* (0xf8-0xfb) */
83 0xb4,0x7b,0xb5,0x7c,0x00,0x00,0x55,0x79, /* (0xfc-0xff) */
86 #define KBD_DATA 0x60
87 #define KBD_SC 0x64
89 #define KBD_IBF (1 << 1) /* 1: input buffer full (data ready for ec) */
90 #define KBD_OBF (1 << 0) /* 1: output buffer full (data ready for host) */
92 static int send_kbd_command(u8 command)
94 int timeout;
96 timeout = 0x7ff;
97 while ((inb(KBD_SC) & KBD_IBF) && --timeout) {
98 udelay(10);
99 if ((timeout & 0xff) == 0)
100 printk(BIOS_SPEW, ".");
102 if (!timeout) {
103 printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n",
104 command);
107 outb(command, KBD_SC);
108 return 0;
111 static int send_kbd_data(u8 data)
113 int timeout;
115 timeout = 0x7ff;
116 while ((inb(KBD_SC) & KBD_IBF) && --timeout) { /* wait for IBF = 0 */
117 udelay(10);
118 if ((timeout & 0xff) == 0)
119 printk(BIOS_SPEW, ".");
121 if (!timeout) {
122 printk(BIOS_DEBUG, "Timeout while sending data 0x%02x to EC!\n",
123 data);
126 outb(data, KBD_DATA);
128 return 0;
131 static u8 recv_kbd_data(void)
133 int timeout;
134 u8 data;
136 timeout = 0x7fff;
137 while (--timeout) { /* Wait for OBF = 1 */
138 if (inb(KBD_SC) & KBD_OBF) {
139 break;
141 udelay(10);
142 if ((timeout & 0xff) == 0)
143 printk(BIOS_SPEW, ".");
145 if (!timeout) {
146 printk(BIOS_DEBUG, "\nTimeout while receiving data from EC!\n");
149 data = inb(KBD_DATA);
151 return data;
154 static u8 m3885_get_variable(u8 index)
156 u8 ret;
158 send_kbd_command(0xb8);
159 send_kbd_data(index);
160 send_kbd_command(0xbc);
161 send_kbd_command(0xff);
162 ret = recv_kbd_data();
163 printk(BIOS_SPEW, "m3885: get variable %02x = %02x\n", index, ret);
164 return ret;
167 static void m3885_set_variable(u8 index, u8 data)
169 printk(BIOS_SPEW, "m3885: set variable %02x = %02x\n", index, data);
170 send_kbd_command(0xb8);
171 send_kbd_data(index);
172 send_kbd_command(0xbd);
173 send_kbd_data(data);
176 static void m3885_set_proc_ram(u8 index, u8 data)
178 printk(BIOS_SPEW, "m3885: set procram %02x = %02x\n", index, data);
179 send_kbd_command(0xb8);
180 send_kbd_data(index);
181 send_kbd_command(0xbb);
182 send_kbd_data(data);
185 static u8 m3885_get_proc_ram(u8 index)
187 u8 ret;
189 send_kbd_command(0xb8);
190 send_kbd_data(index);
191 send_kbd_command(0xba);
192 ret = recv_kbd_data();
193 printk(BIOS_SPEW, "m3885: get procram %02x = %02x\n", index, ret);
194 return ret;
197 static u8 m3885_read_port(void)
199 u8 reg8;
201 reg8 = m3885_get_variable(0x0c);
202 reg8 &= ~(7 << 4);
203 reg8 |= (4 << 4); /* bank 4 */
204 m3885_set_variable(0x0c, reg8);
206 /* P6YSTATE */
207 return m3885_get_proc_ram(0xf8);
210 void m3885_configure_multikey(void)
212 int i;
213 u8 reg8;
214 u8 kstate5_flags, offs, maxvars;
216 /* RAM bank 0 */
217 kstate5_flags = m3885_get_variable(0x0c);
218 m3885_set_variable(0x0c, kstate5_flags & ~(7 << 4));
220 /* Write Matrix to bank 0 */
221 for (i = 0; i < ARRAY_SIZE(matrix); i++) {
222 m3885_set_proc_ram(i + 0x80, matrix[i]);
226 /* RAM bank 2 */
227 m3885_set_variable(0x0c, (kstate5_flags & (~(7 << 4))) | (2 << 4));
229 /* Get the number of variables */
230 maxvars = m3885_get_variable(0x00);
231 printk(BIOS_DEBUG, "M388x has %d variables in bank 2.\n", maxvars);
232 if (maxvars >= 35) {
233 offs = m3885_get_variable(0x23);
234 if ((offs > 0xc0) || (offs < 0x80)) {
235 printk(BIOS_DEBUG, "M388x does not have a valid RAM offset (0x%x)\n", offs);
236 } else {
237 printk(BIOS_DEBUG, "Writing Fn-Table to M388x RAM offset 0x%x\n", offs);
238 for (i = 0; i < ARRAY_SIZE(function_ram); i++) {
239 m3885_set_proc_ram(i + offs, function_ram[i]);
242 } else {
243 printk(BIOS_DEBUG, "Could not load Function-RAM (%d).\n", maxvars);
246 /* restore original bank */
247 m3885_set_variable(0x0c, kstate5_flags);
248 maxvars = m3885_get_variable(0x00);
249 printk(BIOS_DEBUG, "M388x has %d variables in original bank.\n", maxvars);
250 for (i = 0; i < ARRAY_SIZE(variables); i+=3) {
251 if (variables[i + 0] > maxvars)
252 continue;
253 reg8 = m3885_get_variable(variables[i + 0]);
254 reg8 &= ~(variables[i + 1]);
255 reg8 |= variables[i + 2];
256 m3885_set_variable(variables[i + 0], reg8);
259 /* OEM Init */
261 /* Set Bank 1 */
262 m3885_set_variable(0x0c, (kstate5_flags & ~(7 << 4)) | (1 << 4));
264 /* Set SMI# at P5.1 */
265 /* SMI Control -> p5.1 = EXTSMI# */
266 m3885_set_proc_ram(0xff, 0xc1);
268 /* Set Fn-Key Task 0 -> SMI#/SCI */
269 m3885_set_proc_ram(0x6d, 0x81);
271 /* Set Fn-Key Task 1 -> SCI */
272 m3885_set_proc_ram(0x6c, 0x80);
274 /* Number of Thermal Sensors */
275 m3885_set_proc_ram(0xf2, 0x02);
277 /* Critical Task */
278 m3885_set_proc_ram(0xf3, 0x5d);
280 /* Thermal Polling Period */
281 m3885_set_proc_ram(0xf9, 0x0a);
283 /* ReadPort */
285 /* AC PRESN# */
286 if (m3885_read_port() & (1 << 0))
287 reg8 = 0x8a;
288 else
289 reg8 = 0x9a;
290 m3885_set_proc_ram(0xd0, reg8); /* P60SPEC */
292 /* SENSE1# */
293 if (m3885_read_port() & (1 << 2))
294 reg8 = 0x8a;
295 else
296 reg8 = 0x9a;
297 m3885_set_proc_ram(0xd2, reg8); /* P62SPEC */
299 /* SENSE2# */
300 if (m3885_read_port() & (1 << 3))
301 reg8 = 0x8a;
302 else
303 reg8 = 0x9a;
304 m3885_set_proc_ram(0xd3, reg8); /* P63SPEC */
306 /* Low Active Port */
307 m3885_set_proc_ram(0xd1, 0x88); /* P61SPEC */
308 m3885_set_proc_ram(0xd6, 0x88); /* P66SPEC */
309 m3885_set_proc_ram(0xd7, 0x88); /* P67SPEC */
311 /* High Active Port */
312 m3885_set_proc_ram(0xd4, 0x98); /* P64SPEC */
313 m3885_set_proc_ram(0xd5, 0x98); /* P65SPEC */
315 /* Set P60TASK-P67TASK */
316 /* SCI */
317 m3885_set_proc_ram(0xda, 0x80); /* P62TASK SENSE1# */
318 m3885_set_proc_ram(0xdb, 0x80); /* P63TASK SENSE2# */
319 m3885_set_proc_ram(0xdd, 0x80); /* P65TASK PROCHOT */
320 m3885_set_proc_ram(0xde, 0x80); /* P65TASK THERMTRIP# */
321 m3885_set_proc_ram(0xdf, 0x80); /* P65TASK PME# */
322 /* SMI/SCI */
323 m3885_set_proc_ram(0xd8, 0x81); /* P60TASK, AC_PRESN# */
324 m3885_set_proc_ram(0xd9, 0x81); /* P61TASK, LID# */
325 m3885_set_proc_ram(0xdc, 0x81); /* P64TASK, FDD/LPT# */
327 /* Thermal */
328 /* Bank 5 */
329 m3885_set_variable(0x0c, (kstate5_flags & ~(7 << 4)) | (5 << 4));
331 /* Thermal 0: Active cooling, Speed Step Down */
332 m3885_set_proc_ram(0x81, 0x9c); /* THRM0 */
333 m3885_set_proc_ram(0x82, 0x01); /* THRM0 CMD */
334 m3885_set_proc_ram(0x84, TH0LOW); /* THRM0 LOW */
335 m3885_set_proc_ram(0x85, TH0HIGH); /* THRM0 HIGH */
336 m3885_set_proc_ram(0x86, 0x81); /* Set Task SMI#/SCI */
337 m3885_set_proc_ram(0x87, TH0CRIT); /* THRM0 CRIT */
339 /* Thermal 1: Passive cooling, Fan On */
340 m3885_set_proc_ram(0x89, 0x9c); /* THRM1 */
341 m3885_set_proc_ram(0x8a, 0x01); /* THRM1 CMD */
342 m3885_set_proc_ram(0x8c, TH1LOW); /* THRM1 LOW */
343 m3885_set_proc_ram(0x8d, TH1HIGH); /* THRM1 HIGH */
344 m3885_set_proc_ram(0x8e, 0x81); /* Set Task SMI#/SCI */
346 /* Switch Task to SMI */
347 udelay(100 * 1000); /* 100ms */
348 outb(KBD_SC, 0xca);
349 udelay(100 * 1000); /* 100ms */
350 outb(KBD_DATA, 0x17);
352 /* Set P22 to high level, keyboard backlight default off */
353 udelay(100 * 1000); /* 100ms */
354 outb(KBD_SC, 0xc5);
355 udelay(100 * 1000); /* 100ms */
356 outb(KBD_DATA, 0x4a);
359 u8 m3885_gpio(u8 value)
361 /* First write data */
362 ec_write(M3885_CMDAT1, value);
364 /* Issue command: ACCESS GPIO */
365 ec_write(M3885_CMCMD, 0xc5);
366 return 0;