1 # SPDX
-License
-Identifier
: GPL
-2.0-only
3 chip soc
/intel
/cannonlake
7 register
"PchHdaDspEnable" = "0"
8 register
"PchHdaAudioLinkHda" = "1"
11 device ref igpu on
end
12 device ref dptf on
end
13 device ref thermal on
end
16 register
"usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" #
Type-C?
17 register
"usb2_ports[1]" = "USB2_PORT_MID(OC0)" # single blue
18 register
"usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # SIMATIC
NET CP
5711
19 register
"usb2_ports[7]" = "USB2_PORT_MID(OC1)" # upper blue
20 register
"usb2_ports[8]" = "USB2_PORT_MID(OC4)" # lower blue
21 register
"usb2_ports[11]" = "USB2_PORT_MID(OC_SKIP)" # STM SC?
23 register
"usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" #
Type-C?
24 register
"usb3_ports[2]" = "USB3_PORT_DEFAULT(OC1)" # upper blue
25 register
"usb3_ports[3]" = "USB3_PORT_DEFAULT(OC4)" # lower blue
26 register
"usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Realtek storage?
27 register
"usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)" # single blue
29 device ref shared_sram on
end
31 register
"SataSalpSupport" = "1"
32 register
"SataPortsEnable[0]" = "1" # HDD
/ SSD
33 register
"SataPortsEnable[1]" = "1" # ODD
34 register
"SataPortsEnable[3]" = "1" # HDD
/ SSD
36 register
"SataPortsDevSlp[0]" = "1" # M
.2
37 register
"SataPortsDevSlp[2]" = "1" # HDD
/ SSD
39 device ref pcie_rp5 on
40 device pci
00.0 on
end # x1 i219
41 register
"PcieRpEnable[4]" = "1"
42 register
"PcieClkSrcUsage[4]" = "0x70"
43 register
"PcieClkSrcClkReq[4]" = "4"
44 register
"PcieRpSlotImplemented[4]" = "0"
46 device ref pcie_rp6 on
47 device pci
00.0 on
end # x1 i210
48 register
"PcieRpEnable[5]" = "1"
49 register
"PcieClkSrcUsage[5]" = "5"
50 register
"PcieClkSrcClkReq[5]" = "5"
51 register
"PcieRpSlotImplemented[5]" = "0"
53 device ref pcie_rp7 on
54 register
"PcieRpEnable[6]" = "1"
55 register
"PcieRpSlotImplemented[6]" = "1"
56 smbios_slot_desc
"SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230" "SlotDataBusWidth1X"
58 device ref pcie_rp17 on
59 register
"PcieRpEnable[16]" = "1"
60 register
"PcieClkSrcUsage[7]" = "16"
61 register
"PcieClkSrcClkReq[7]" = "7"
62 register
"PcieRpSlotImplemented[16]" = "1"
63 smbios_slot_desc
"SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
65 device ref lpc_espi on
67 device pnp
0c31.0 on
end
71 device ref smbus on
end