src/mainboard/system76/rpl/variants/darp9/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <mainboard/gpio.h>
   4 #include <soc/gpio.h>
   5
   6 static const struct pad_config gpio_table[] = {
   7         /* ------- GPIO Group GPD ------- */
   8         PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1), // PM_BATLOW#
   9         PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), // AC_PRESENT
  10         PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1), // LAN_WAKE#
  11         PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), // PWR_BTN#
  12         PAD_CFG_NF(GPD4, NONE, PWROK, NF1), // SUSB#_PCH
  13         PAD_CFG_NF(GPD5, NONE, PWROK, NF1), // SUSC#_PCH
  14         PAD_CFG_NF(GPD6, NONE, PWROK, NF1), // SLP_A#
  15         PAD_NC(GPD7, NONE),
  16         PAD_CFG_NF(GPD8, NONE, PWROK, NF1), // SUS_CLK
  17         PAD_CFG_GPO(GPD9, 0, PWROK), // SLP_WLAN#
  18         PAD_CFG_NF(GPD10, NONE, PWROK, NF1), // SLP_S5#
  19         PAD_CFG_NF(GPD11, NONE, PWROK, NF1), // LAN_DISABLE#
  20
  21         /* ------- GPIO Group GPP_A ------- */
  22         PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1), // ESPI_IO0_EC
  23         PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1), // ESPI_IO1_EC
  24         PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1), // ESPI_IO2_EC
  25         PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1), // ESPI_IO3_EC
  26         PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1), // ESPI_CS_EC#
  27         PAD_CFG_NF(GPP_A5, UP_20K, DEEP, NF1), // ESPI_ALRT0#
  28         PAD_NC(GPP_A6, NONE),
  29         PAD_NC(GPP_A7, NONE), // SATAGP0_PCIE_SSD2
  30         PAD_CFG_GPO(GPP_A8, 1, PLTRST), // GPIO_LANRTD3
  31         PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1), // ESPI_CLK_EC
  32         PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), // ESPI_RESET_N
  33         PAD_NC(GPP_A11, NONE),
  34         PAD_NC(GPP_A12, NONE), // SATAGP1_SATA_SSD1
  35         PAD_CFG_GPO(GPP_A13, 1, PLTRST), // BT_EN
  36         PAD_NC(GPP_A14, NONE),
  37         PAD_NC(GPP_A15, NONE),
  38         // GPP_A16 missing
  39         PAD_NC(GPP_A17, NONE),
  40         PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), // HDMI_HPD
  41         PAD_NC(GPP_A19, NONE),
  42         PAD_NC(GPP_A20, NONE),
  43         PAD_NC(GPP_A21, NONE), // SSD1_PCIE_WAKE#
  44         PAD_NC(GPP_A22, NONE), // SSD2_PCIE_WAKE#
  45         PAD_NC(GPP_A23, NONE),
  46
  47         /* ------- GPIO Group GPP_B ------- */
  48         PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), // VCCIN_AUX_VID0
  49         PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), // VCCIN_AUX_VID1
  50         PAD_NC(GPP_B2, NONE),
  51         PAD_CFG_GPO(GPP_B3, 0, DEEP), // SCI#
  52         PAD_CFG_GPO(GPP_B4, 0, DEEP), // SWI#
  53         PAD_NC(GPP_B5, NONE),
  54         PAD_NC(GPP_B6, NONE),
  55         PAD_NC(GPP_B7, NONE),
  56         PAD_NC(GPP_B8, NONE),
  57         // GPP_B9 missing
  58         // GPP_B10 missing
  59         PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1), // TBTA-PCH_I2C_INT
  60         PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), // SLP_S0#
  61         PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), // PLT_RST#
  62         PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), // Top swap override
  63         PAD_NC(GPP_B15, NONE),
  64         PAD_CFG_GPO(GPP_B16, 1, PLTRST), // M2_SSD1_RST#
  65         PAD_CFG_GPO(GPP_B17, 1, PLTRST), // WLAN_RST#_R
  66         PAD_NC(GPP_B18, NONE), // NO REBOOT strap
  67         // GPP_B19 missing
  68         // GPP_B20 missing
  69         // GPP_B21 missing
  70         // GPP_B22 missing
  71         PAD_NC(GPP_B23, NONE),
  72
  73         /* ------- GPIO Group GPP_C ------- */
  74         PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), // SMB_CLK_DDR; XXX: NC?
  75         PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), // SMB_DAT_DDR; XXX: NC?
  76         PAD_CFG_GPO(GPP_C2, 1, PLTRST),
  77         PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), // SML0_CLK_R
  78         PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), // SML0_DATA_R
  79         PAD_NC(GPP_C5, NONE),
  80         PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), // TBT-PCH_I2C_SCL
  81         PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), // TBT-PCH_I2C_SDA
  82         // GPP_C8 missing
  83         // GPP_C9 missing
  84         // GPP_C10 missing
  85         // GPP_C11 missing
  86         // GPP_C12 missing
  87         // GPP_C13 missing
  88         // GPP_C14 missing
  89         // GPP_C15 missing
  90         // GPP_C16 missing
  91         // GPP_C17 missing
  92         // GPP_C18 missing
  93         // GPP_C19 missing
  94         // GPP_C20 missing
  95         // GPP_C21 missing
  96         // GPP_C22 missing
  97         // GPP_C23 missing
  98
  99         /* ------- GPIO Group GPP_D ------- */
 100         PAD_CFG_GPO(GPP_D0, 1, DEEP), // SB_BLON
 101         PAD_CFG_GPI(GPP_D1, NONE, DEEP), // SB_KBCRST#
 102         PAD_CFG_GPO(GPP_D2, 0, DEEP), // ROM_I2C_EN
 103         PAD_NC(GPP_D3, NONE),
 104         PAD_CFG_GPO(GPP_D4, 1, DEEP), // GPIO_LAN_EN
 105         // GPP_D5 (SSD2_CLKREQ#) configured by FSP
 106         PAD_CFG_GPO(GPP_D6, 1, DEEP), // LAN_PLT_RST#
 107         // GPP_D7 (WLAN_CLKREQ#) configured by FSP
 108         PAD_NC(GPP_D8, NONE),
 109         PAD_NC(GPP_D9, NONE),
 110         PAD_NC(GPP_D10, NONE),
 111         PAD_NC(GPP_D11, NONE),
 112         PAD_NC(GPP_D12, NONE),
 113         PAD_CFG_GPI(GPP_D13, NONE, DEEP), // WLAN_WAKEUP#
 114         PAD_CFG_GPO(GPP_D14, 1, PLTRST), // SSD2_PWR_EN
 115         PAD_CFG_GPO(GPP_D15, 1, DEEP), // GPP_D2_SDCARD_RST#
 116         PAD_CFG_GPO(GPP_D16, 1, DEEP), // SSD1_PWR_EN
 117         PAD_NC(GPP_D17, NONE),
 118         PAD_NC(GPP_D18, NONE),
 119         PAD_CFG_GPI(GPP_D19, NONE, DEEP), // SATA_LED#
 120
 121         /* ------- GPIO Group GPP_E ------- */
 122         PAD_CFG_GPI(GPP_E0, NONE, DEEP), // CNVI_WAKE#
 123         _PAD_CFG_STRUCT(GPP_E1, 0x40100100, 0x3000), // TPM_PIRQ#
 124         PAD_NC(GPP_E2, NONE),
 125         PAD_CFG_GPO(GPP_E3, 1, PLTRST), // GPP_E3_WLAN_EN
 126         // GPP_E4 missing
 127         // GPP_E5 missing
 128         PAD_NC(GPP_E6, NONE),
 129         PAD_CFG_GPO(GPP_E7, 0, DEEP), // SMI#
 130         PAD_CFG_GPI(GPP_E8, NONE, DEEP), // SLP_DRAM#
 131         // GPP_E9 missing
 132         PAD_NC(GPP_E10, NONE),
 133         PAD_NC(GPP_E11, NONE),
 134         PAD_CFG_GPI_INT(GPP_E12, NONE, PLTRST, LEVEL), // TP_ATTN#
 135         PAD_NC(GPP_E13, NONE),
 136         PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), // EDP_HPD
 137         PAD_NC(GPP_E15, NONE),
 138         PAD_CFG_GPI(GPP_E16, NONE, DEEP), // SDCARD_WAKE#
 139         PAD_NC(GPP_E17, NONE),
 140         // GPP_E18 (TBT_LSX0_TXD) configured by FSP
 141         // GPP_E19 (TBT_LSX0_RXD) configured by FSP
 142         PAD_NC(GPP_E20, NONE),
 143         PAD_NC(GPP_E21, NONE),
 144         PAD_NC(GPP_E22, NONE),
 145         PAD_NC(GPP_E23, NONE),
 146
 147         /* ------- GPIO Group GPP_F ------- */
 148         PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), // CNVI_BRI_DT
 149         PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1), // CNVI_BRI_RSP
 150         PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1), // CNVI_RGI_DT
 151         PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1), // CNVI_RGI_RSP
 152         PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), // CNVI_RST#
 153         // GPP_F5 (CNVI_CLKREQ) configured by FSP
 154         PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1), // CNVI_GNSS_PA_BLANKING
 155         PAD_NC(GPP_F7, NONE),
 156         // GPP_F8 missing
 157         PAD_NC(GPP_F9, NONE),
 158         PAD_NC(GPP_F10, NONE),
 159         PAD_NC(GPP_F11, NONE), // BOARD_ID3
 160         PAD_NC(GPP_F12, NONE),
 161         PAD_NC(GPP_F13, NONE),
 162         PAD_NC(GPP_F14, NONE), // BOARD_ID1
 163         PAD_NC(GPP_F15, NONE), // BOARD_ID2
 164         PAD_NC(GPP_F16, NONE),
 165         PAD_CFG_GPO(GPP_F17, 1, PLTRST), // GPIO_SDCARD_EN
 166         PAD_CFG_GPO(GPP_F18, 0, DEEP), // CCD_WP#
 167         // GPP_F19 (GLAN_CLKREQ6#) configured by FSP
 168         PAD_CFG_GPO(GPP_F20, 1, PLTRST), // M2_SSD2_RST#
 169         PAD_NC(GPP_F21, NONE),
 170         PAD_NC(GPP_F22, NONE),
 171         PAD_NC(GPP_F23, NONE),
 172
 173         /* ------- GPIO Group GPP_H ------- */
 174         PAD_NC(GPP_H0, NONE),
 175         PAD_NC(GPP_H1, NONE),
 176         PAD_NC(GPP_H2, NONE),
 177         PAD_CFG_GPI(GPP_H3, NONE, DEEP), // TPM_DET
 178         PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), // I2C_SDA_TP
 179         PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), // I2C_SCL_TP
 180         PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), // PCH_I2C_SDA
 181         PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), // PCH_I2C_SCL
 182         PAD_CFG_NF(GPP_H8, NONE, DEEP, NF2), // CNVI_MFUART2_RXD
 183         PAD_CFG_NF(GPP_H9, NONE, DEEP, NF2), // CNVI_MFUART2_TXD
 184         // GPP_H10 (UART0_RX) configured in bootblock
 185         // GPP_H11 (UART0_TX) configured in bootblock
 186         _PAD_CFG_STRUCT(GPP_H12, 0x44001500, 0x0000), // SATA1_DEVSLP1
 187         PAD_NC(GPP_H13, NONE),
 188         // GPP_H14 missing
 189         PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), // HDMI_CTRLCLK
 190         // GPP_H16 missing
 191         PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), // HDMI_CTRLDATA
 192         PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), // CPU_C10_GATE#
 193         // GPP_H19 (SSD1_CLKREQ#) configured by FSP
 194         PAD_CFG_GPI(GPP_H20, NONE, DEEP), // PM_CLKRUN#
 195         PAD_NC(GPP_H21, NONE),
 196         PAD_NC(GPP_H22, NONE),
 197         // GPP_H23 (CARD_CLKREQ#) configured by FSP
 198
 199         /* ------- GPIO Group GPP_R ------- */
 200         PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1), // HDA_BITCLK
 201         PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), // HDA_SYNC
 202         PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), // HDA_SDOUT / ME_WE
 203         PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), // HDA_SDIN0
 204         PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1), // HDA_RST#
 205         PAD_NC(GPP_R5, NONE),
 206         PAD_NC(GPP_R6, NONE),
 207         PAD_NC(GPP_R7, NONE),
 208
 209         /* ------- GPIO Group GPP_S ------- */
 210         PAD_NC(GPP_S0, NONE),
 211         PAD_NC(GPP_S1, NONE),
 212         PAD_NC(GPP_S2, NONE),
 213         PAD_NC(GPP_S3, NONE),
 214         PAD_NC(GPP_S4, NONE),
 215         PAD_NC(GPP_S5, NONE),
 216         PAD_NC(GPP_S6, NONE),
 217         PAD_NC(GPP_S7, NONE),
 218
 219         /* ------- GPIO Group GPP_T ------- */
 220         PAD_NC(GPP_T2, NONE),
 221         PAD_NC(GPP_T3, NONE),
 222 };
 223
 224 void mainboard_configure_gpios(void)
 225 {
 226         gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
 227 }