soc/amd/glinda: Update MCA banks
[coreboot.git] / src / soc / amd / cezanne / xhci.c
blobfc1c11920efb2f3e3907fa9bc77a97a5526b8c3f
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <amdblocks/gpio.h>
4 #include <amdblocks/smi.h>
5 #include <amdblocks/xhci.h>
6 #include <bootstate.h>
7 #include <device/device.h>
8 #include <drivers/usb/pci_xhci/pci_xhci.h>
9 #include <soc/pci_devs.h>
10 #include <soc/smi.h>
12 static const struct sci_source xhci_sci_sources[] = {
14 .scimap = SMITYPE_XHC0_PME,
15 .gpe = XHCI_GEVENT,
16 .direction = SMI_SCI_LVL_HIGH,
17 .level = SMI_SCI_EDG
20 .scimap = SMITYPE_XHC1_PME,
21 .gpe = XHCI_GEVENT,
22 .direction = SMI_SCI_LVL_HIGH,
23 .level = SMI_SCI_EDG
27 enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
29 if (dev->upstream->dev->path.type != DEVICE_PATH_PCI)
30 return CB_ERR_ARG;
32 if (dev->upstream->dev->path.pci.devfn != PCIE_ABC_A_DEVFN)
33 return CB_ERR_ARG;
35 if (dev->path.type != DEVICE_PATH_PCI)
36 return CB_ERR_ARG;
38 if (dev->path.pci.devfn == XHCI0_DEVFN)
39 *gpe = xhci_sci_sources[0].gpe;
40 else if (dev->path.pci.devfn == XHCI1_DEVFN)
41 *gpe = xhci_sci_sources[1].gpe;
42 else
43 return CB_ERR_ARG;
45 return CB_SUCCESS;
48 static void configure_xhci_sci(void *unused)
50 gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources));
53 BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, configure_xhci_sci, NULL);