src/soc/amd/stoneyridge/enable_usbdebug.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 // Use simple device model for this file even in ramstage
   4 #define __SIMPLE_DEVICE__
   5
   6 #include <stdint.h>
   7 #include <device/pci_ops.h>
   8 #include <device/pci_ehci.h>
   9 #include <device/pci_def.h>
  10 #include <soc/pci_devs.h>
  11 #include <soc/southbridge.h>
  12 #include <amdblocks/acpimmio.h>
  13
  14 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
  15 {
  16         pm_io_write8(PM_USB_ENABLE, PM_USB_ALL_CONTROLLERS);
  17         return SOC_EHCI1_DEV;
  18 }
  19
  20 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
  21 {
  22         u32 reg32, value;
  23
  24         value = (port & 0x3) << DEBUG_PORT_SELECT_SHIFT;
  25         value |= DEBUG_PORT_ENABLE;
  26         reg32 = pci_read_config32(SOC_EHCI1_DEV, EHCI_HUB_CONFIG4);
  27         reg32 &= ~DEBUG_PORT_MASK;
  28         reg32 |= value;
  29         pci_write_config32(SOC_EHCI1_DEV, EHCI_HUB_CONFIG4, reg32);
  30 }