MAINTAINERS: Add Yuchi and Vasiliy for Intel Atom Snow Ridge SoC
[coreboot.git] / src / soc / intel / broadwell / spd.c
blob1af66f1d6748f3a8e6cf2ed0061016a3e89c719c
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <cbfs.h>
4 #include <console/console.h>
5 #include <soc/pei_data.h>
6 #include <soc/pei_wrapper.h>
7 #include <string.h>
8 #include <types.h>
10 #define SPD_DRAM_TYPE 2
11 #define SPD_DRAM_DDR3 0x0b
12 #define SPD_DRAM_LPDDR3 0xf1
13 #define SPD_DENSITY_BANKS 4
14 #define SPD_ADDRESSING 5
15 #define SPD_ORGANIZATION 7
16 #define SPD_BUS_DEV_WIDTH 8
17 #define SPD_PART_OFF 128
18 #define SPD_PART_LEN 18
20 #define SPD_LEN 256
22 static void print_spd_info(uint8_t spd[])
24 const int spd_banks[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
25 const int spd_capmb[8] = { 1, 2, 4, 8, 16, 32, 64, 0 };
26 const int spd_rows[8] = { 12, 13, 14, 15, 16, -1, -1, -1 };
27 const int spd_cols[8] = { 9, 10, 11, 12, -1, -1, -1, -1 };
28 const int spd_ranks[8] = { 1, 2, 3, 4, -1, -1, -1, -1 };
29 const int spd_devw[8] = { 4, 8, 16, 32, -1, -1, -1, -1 };
30 const int spd_busw[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
31 char spd_name[SPD_PART_LEN+1] = { 0 };
33 int banks = spd_banks[(spd[SPD_DENSITY_BANKS] >> 4) & 7];
34 int capmb = spd_capmb[spd[SPD_DENSITY_BANKS] & 7] * 256;
35 int rows = spd_rows[(spd[SPD_ADDRESSING] >> 3) & 7];
36 int cols = spd_cols[spd[SPD_ADDRESSING] & 7];
37 int ranks = spd_ranks[(spd[SPD_ORGANIZATION] >> 3) & 7];
38 int devw = spd_devw[spd[SPD_ORGANIZATION] & 7];
39 int busw = spd_busw[spd[SPD_BUS_DEV_WIDTH] & 7];
41 /* Module type */
42 printk(BIOS_INFO, "SPD: module type is ");
43 switch (spd[SPD_DRAM_TYPE]) {
44 case SPD_DRAM_DDR3:
45 printk(BIOS_INFO, "DDR3\n");
46 break;
47 case SPD_DRAM_LPDDR3:
48 printk(BIOS_INFO, "LPDDR3\n");
49 break;
50 default:
51 printk(BIOS_INFO, "Unknown (%02x)\n", spd[SPD_DRAM_TYPE]);
52 break;
55 /* Module Part Number */
56 memcpy(spd_name, &spd[SPD_PART_OFF], SPD_PART_LEN);
57 spd_name[SPD_PART_LEN] = 0;
58 printk(BIOS_INFO, "SPD: module part is %s\n", spd_name);
60 printk(BIOS_INFO, "SPD: banks %d, ranks %d, rows %d, columns %d, "
61 "density %d Mb\n", banks, ranks, rows, cols, capmb);
62 printk(BIOS_INFO, "SPD: device width %d bits, bus width %d bits\n",
63 devw, busw);
65 if (capmb > 0 && busw > 0 && devw > 0 && ranks > 0) {
66 /* SIZE = DENSITY / 8 * BUS_WIDTH / SDRAM_WIDTH * RANKS */
67 printk(BIOS_INFO, "SPD: module size is %u MB (per channel)\n",
68 capmb / 8 * busw / devw * ranks);
72 void copy_spd(struct pei_data *pei_data, struct spd_info *spdi)
74 size_t spd_file_len;
75 uint8_t *spd_file = cbfs_map("spd.bin", &spd_file_len);
77 printk(BIOS_DEBUG, "SPD index %d\n", spdi->spd_index);
79 if (!spd_file)
80 die("SPD data not found.");
82 if (spd_file_len < SPD_LEN)
83 die("Missing SPD data.");
85 if (spd_file_len < ((spdi->spd_index + 1) * SPD_LEN)) {
86 printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n");
87 spdi->spd_index = 0;
90 uint8_t *const spd = spd_file + (spdi->spd_index * SPD_LEN);
92 /* Make sure a valid SPD was found */
93 if (spd[0] == 0)
94 die("Invalid SPD data.");
96 print_spd_info(spd);
98 for (size_t i = 0; i < ARRAY_SIZE(spdi->addresses); i++) {
99 if (spdi->addresses[i] == SPD_MEMORY_DOWN)
100 memcpy(pei_data->spd_data[i / 2][i % 2], spd, SPD_LEN);