1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /* Intel PCH PCIe support */
5 Method (IRQM, 1, Serialized) {
7 /* Interrupt Map INTA->INTA, INTB->INTB, INTC->INTC, INTD->INTD */
8 Name (IQAA, Package () {
9 Package () { 0x0000ffff, 0, 0, 16 },
10 Package () { 0x0000ffff, 1, 0, 17 },
11 Package () { 0x0000ffff, 2, 0, 18 },
12 Package () { 0x0000ffff, 3, 0, 19 } })
13 Name (IQAP, Package () {
14 Package () { 0x0000ffff, 0, 0, 11 },
15 Package () { 0x0000ffff, 1, 0, 10 },
16 Package () { 0x0000ffff, 2, 0, 11 },
17 Package () { 0x0000ffff, 3, 0, 11 } })
19 /* Interrupt Map INTA->INTB, INTB->INTC, INTC->INTD, INTD->INTA */
20 Name (IQBA, Package () {
21 Package () { 0x0000ffff, 0, 0, 17 },
22 Package () { 0x0000ffff, 1, 0, 18 },
23 Package () { 0x0000ffff, 2, 0, 19 },
24 Package () { 0x0000ffff, 3, 0, 16 } })
25 Name (IQBP, Package () {
26 Package () { 0x0000ffff, 0, 0, 10 },
27 Package () { 0x0000ffff, 1, 0, 11 },
28 Package () { 0x0000ffff, 2, 0, 11 },
29 Package () { 0x0000ffff, 3, 0, 11 } })
31 /* Interrupt Map INTA->INTC, INTB->INTD, INTC->INTA, INTD->INTB */
32 Name (IQCA, Package () {
33 Package () { 0x0000ffff, 0, 0, 18 },
34 Package () { 0x0000ffff, 1, 0, 19 },
35 Package () { 0x0000ffff, 2, 0, 16 },
36 Package () { 0x0000ffff, 3, 0, 17 } })
37 Name (IQCP, Package () {
38 Package () { 0x0000ffff, 0, 0, 11 },
39 Package () { 0x0000ffff, 1, 0, 11 },
40 Package () { 0x0000ffff, 2, 0, 11 },
41 Package () { 0x0000ffff, 3, 0, 10 } })
43 /* Interrupt Map INTA->INTD, INTB->INTA, INTC->INTB, INTD->INTC */
44 Name (IQDA, Package () {
45 Package () { 0x0000ffff, 0, 0, 19 },
46 Package () { 0x0000ffff, 1, 0, 16 },
47 Package () { 0x0000ffff, 2, 0, 17 },
48 Package () { 0x0000ffff, 3, 0, 18 } })
49 Name (IQDP, Package () {
50 Package () { 0x0000ffff, 0, 0, 11 },
51 Package () { 0x0000ffff, 1, 0, 11 },
52 Package () { 0x0000ffff, 2, 0, 10 },
53 Package () { 0x0000ffff, 3, 0, 11 } })
55 Switch (ToInteger (Arg0))
57 Case (Package () { 1, 5, 9, 13
58 #if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
69 Case (Package () { 2, 6, 10, 14
70 #if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
81 Case (Package () { 3, 7, 11, 15
82 #if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
93 Case (Package () { 4, 8, 12, 16
94 #if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
117 Name (_ADR, 0x001C0000)
119 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
120 Field (RPCS, AnyAcc, NoLock, Preserve)
123 RPPN, 8, /* Root Port Number */
134 Name (_ADR, 0x001C0001)
136 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
137 Field (RPCS, AnyAcc, NoLock, Preserve)
140 RPPN, 8, /* Root Port Number */
151 Name (_ADR, 0x001C0002)
153 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
154 Field (RPCS, AnyAcc, NoLock, Preserve)
157 RPPN, 8, /* Root Port Number */
168 Name (_ADR, 0x001C0003)
170 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
171 Field (RPCS, AnyAcc, NoLock, Preserve)
174 RPPN, 8, /* Root Port Number */
185 Name (_ADR, 0x001C0004)
187 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
188 Field (RPCS, AnyAcc, NoLock, Preserve)
191 RPPN, 8, /* Root Port Number */
202 Name (_ADR, 0x001C0005)
204 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
205 Field (RPCS, AnyAcc, NoLock, Preserve)
208 RPPN, 8, /* Root Port Number */
219 Name (_ADR, 0x001C0006)
221 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
222 Field (RPCS, AnyAcc, NoLock, Preserve)
225 RPPN, 8, /* Root Port Number */
236 Name (_ADR, 0x001C0007)
238 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
239 Field (RPCS, AnyAcc, NoLock, Preserve)
242 RPPN, 8, /* Root Port Number */
253 Name (_ADR, 0x001D0000)
255 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
256 Field (RPCS, AnyAcc, NoLock, Preserve)
259 RPPN, 8, /* Root Port Number */
270 Name (_ADR, 0x001D0001)
272 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
273 Field (RPCS, AnyAcc, NoLock, Preserve)
276 RPPN, 8, /* Root Port Number */
287 Name (_ADR, 0x001D0002)
289 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
290 Field (RPCS, AnyAcc, NoLock, Preserve)
293 RPPN, 8, /* Root Port Number */
304 Name (_ADR, 0x001D0003)
306 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
307 Field (RPCS, AnyAcc, NoLock, Preserve)
310 RPPN, 8, /* Root Port Number */
321 Name (_ADR, 0x001D0004)
323 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
324 Field (RPCS, AnyAcc, NoLock, Preserve)
327 RPPN, 8, /* Root Port Number */
338 Name (_ADR, 0x001D0005)
340 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
341 Field (RPCS, AnyAcc, NoLock, Preserve)
344 RPPN, 8, /* Root Port Number */
355 Name (_ADR, 0x001D0006)
357 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
358 Field (RPCS, AnyAcc, NoLock, Preserve)
361 RPPN, 8, /* Root Port Number */
372 Name (_ADR, 0x001D0007)
374 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
375 Field (RPCS, AnyAcc, NoLock, Preserve)
378 RPPN, 8, /* Root Port Number */
387 #if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
390 Name (_ADR, 0x001B0000)
392 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
393 Field (RPCS, AnyAcc, NoLock, Preserve)
396 RPPN, 8, /* Root Port Number */
407 Name (_ADR, 0x001B0001)
409 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
410 Field (RPCS, AnyAcc, NoLock, Preserve)
413 RPPN, 8, /* Root Port Number */
424 Name (_ADR, 0x001B0002)
426 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
427 Field (RPCS, AnyAcc, NoLock, Preserve)
430 RPPN, 8, /* Root Port Number */
441 Name (_ADR, 0x001B0003)
443 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
444 Field (RPCS, AnyAcc, NoLock, Preserve)
447 RPPN, 8, /* Root Port Number */
458 Name (_ADR, 0x001B0004)
460 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
461 Field (RPCS, AnyAcc, NoLock, Preserve)
464 RPPN, 8, /* Root Port Number */
475 Name (_ADR, 0x001B0005)
477 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
478 Field (RPCS, AnyAcc, NoLock, Preserve)
481 RPPN, 8, /* Root Port Number */
492 Name (_ADR, 0x001B0006)
494 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
495 Field (RPCS, AnyAcc, NoLock, Preserve)
498 RPPN, 8, /* Root Port Number */
509 Name (_ADR, 0x001B0007)
511 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
512 Field (RPCS, AnyAcc, NoLock, Preserve)
515 RPPN, 8, /* Root Port Number */
527 Name (_ADR, 0x00140002)
532 Name (_ADR, 0x00160000)