| blob | fcadcbdc1c93012501ff2c806b748c60bed3515e |
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <soc/pcr_ids.h>
5 Scope (\_SB.PCI0) {
7 /*
8 * Clear register 0x1C20/0x4820
9 * Arg0 - PCR Port ID
10 */
11 Method(SCSC, 1, Serialized)
12 {
13 ^PCRA (Arg0, 0x1C20, 0x0)
14 ^PCRA (Arg0, 0x4820, 0x0)
15 }
17 /* EMMC */
18 Device(EMMC) {
19 Name(_ADR, 0x001A0000)
20 Name (_DDN, "eMMC Controller")
21 Name (TEMP, 0)
22 Name (DSUU, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))
24 OperationRegion(SCSR, PCI_Config, 0x00, 0x100)
25 Field(SCSR, WordAcc, NoLock, Preserve) {
26 VDID, 32, /* PCI VID DID */
27 Offset (0x84), /* PMECTRLSTATUS */
28 PMCR, 16,
29 Offset (0xA2), /* PG_CONFIG */
30 , 2,
31 PGEN, 1, /* PG_ENABLE */
32 }
34 Method(_INI) {
35 /* Clear register 0x1C20/0x4820 */
36 ^^SCSC (PID_EMMC)
37 }
39 Method(_PS0, 0, Serialized) {
40 Stall (50) // Sleep 50 us
42 PGEN = 0 // Disable PG
44 /* Clear register 0x1C20/0x4820 */
45 ^^SCSC (PID_EMMC)
47 /* Set Power State to D0 */
48 PMCR &= 0xFFFC
49 ^TEMP = PMCR
50 }
52 Method(_PS3, 0, Serialized) {
53 PGEN = 1 // Enable PG
55 /* Set Power State to D3 */
56 PMCR |= 3
57 ^TEMP = PMCR
58 }
60 Device (CARD)
61 {
62 Name (_ADR, 0x00000008)
63 Method (_RMV, 0, NotSerialized)
64 {
65 Return (0)
66 }
67 }
68 /* _DSM x86 Device Specific Method
69 * Arg0: UUID Unique function identifier
70 * Arg1: Integer Revision Level
71 * Arg2: Integer Function Index (0 = Return Supported Functions)
72 * Arg3: Package Parameters
73 */
74 Method (_DSM, 4)
75 {
76 If (Arg0 == ^DSUU) {
77 /* Check the revision */
78 If (Arg1 >= 0) {
79 /*
80 * Function Index 0 the return value is a buffer
81 * containing one bit for each function index, starting
82 * with zero.
83 * Bit 0 - Indicates whether there is support for any
84 * functions other than function 0
85 * Bit 1 - Indicates support to clear power control
86 * register
87 * Bit 2 - Indicates support to set power control
88 * register
89 * Bit 3 - Indicates support to set 1.8V signalling
90 * Bit 4 - Indicates support to set 3.3V signalling
91 * Bit 5 - Indicates support for HS200 mode
92 * Bit 6 - Indicates support for HS400 mode
93 * Bit 9 - Indicates eMMC I/O Driver Strength
94 */
95 If (Arg2 == 0) {
96 If (VDID == 0x02c48086) {
97 /*
98 * Set bit 9 for CML eMMC to indicate
99 * eMMC I/O driver strength is supported
100 */
101 Return(Buffer() {0x0, 0x02})
102 }
104 }
105 /*
106 * Function Index 9, the return value is preferred eMMC
107 * driver strength
108 * 0 - 50 ohm
109 * 1 - 33 ohm
110 * 2 - 66 ohm
111 * 3 - 100 ohm
112 * 4 - 40 ohm
113 */
114 If (Arg2 == 9) {
115 Return(Buffer() {0x4})
116 }
117 }
118 }
119 Return(Buffer() { 0x0 })
120 }
121 }
123 /* SD CARD */
124 Device (SDXC)
125 {
126 Name (_ADR, 0x00140005)
127 Name (_DDN, "SD Controller")
128 Name (TEMP, 0)
129 Name (DSUU, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))
131 OperationRegion (SDPC, PCI_Config, 0x00, 0x100)
132 Field (SDPC, WordAcc, NoLock, Preserve)
133 {
134 Offset (0x84), /* PMECTRLSTATUS */
135 PMCR, 16,
136 Offset (0xA2), /* PG_CONFIG */
137 , 2,
138 PGEN, 1, /* PG_ENABLE */
139 }
141 /* _DSM x86 Device Specific Method
142 * Arg0: UUID Unique function identifier
143 * Arg1: Integer Revision Level
144 * Arg2: Integer Function Index (0 = Return Supported Functions)
145 * Arg3: Package Parameters
146 */
147 Method (_DSM, 4)
148 {
149 If (Arg0 == ^DSUU) {
150 /* Check the revision */
151 If (Arg1 >= 0) {
152 /*
153 * Function Index 0 the return value is a buffer containing
154 * one bit for each function index, starting with zero.
155 * Bit 0 - Indicates whether there is support for any functions other than function 0.
156 * Bit 1 - Indicates support to clear power control register
157 * Bit 2 - Indicates support to set power control register
158 * Bit 3 - Indicates support to set 1.8V signalling
159 * Bit 4 - Indicates support to set 3.3V signalling
160 * Bit 5 - Indicates support for HS200 mode
161 * Bit 6 - Indicates support for HS400 mode
162 * Bit 9 - Indicates eMMC I/O Driver Strength
163 */
164 /*
165 * For SD we have to support functions to
166 * set 1.8V signalling and 3.3V signalling [BIT4, BIT3]
167 */
168 If (Arg2 == 0) {
169 Return (Buffer () { 0x19 })
170 }
171 /*
172 * Function Index 3: Set 1.8v signalling.
173 * We put a sleep of 100ms in this method to
174 * work around a known issue with detecting
175 * UHS SD card on PCH. This is to compensate
176 * for the SD VR slowness.
177 */
178 If (Arg2 == 3) {
179 Sleep (100)
180 Return(Buffer () { 0x00 })
181 }
182 /*
183 * Function Index 4: Set 3.3v signalling.
184 * We put a sleep of 100ms in this method to
185 * work around a known issue with detecting
186 * UHS SD card on PCH. This is to compensate
187 * for the SD VR slowness.
188 */
189 If (Arg2 == 4) {
190 Sleep (100)
191 Return(Buffer () { 0x00 })
192 }
193 }
194 }
195 Return(Buffer() { 0x0 })
196 }
198 Method(_INI)
199 {
200 /* Clear register 0x1C20/0x4820 */
201 ^^SCSC (PID_SDX)
202 }
204 Method (_PS0, 0, Serialized)
205 {
206 PGEN = 0 /* Disable PG */
208 /* Clear register 0x1C20/0x4820 */
209 ^^SCSC (PID_SDX)
211 /* Set Power State to D0 */
212 PMCR &= 0xFFFC
213 ^TEMP = PMCR
215 #if CONFIG(MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE)
216 /* Change pad mode to Native */
217 GPMO(SD_PWR_EN_PIN, 0x1)
218 #endif
219 }
221 Method (_PS3, 0, Serialized)
222 {
223 PGEN = 1 /* Enable PG */
225 /* Set Power State to D3 */
226 PMCR |= 3
227 ^TEMP = PMCR
229 #if CONFIG(MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE)
230 /* Change pad mode to GPIO control */
231 GPMO(SD_PWR_EN_PIN, 0x0)
233 /* Enable Tx Buffer */
234 GTXE(SD_PWR_EN_PIN, 0x1)
236 /* Drive TX to zero */
237 CTXS(SD_PWR_EN_PIN)
238 #endif
239 }
241 Device (CARD)
242 {
243 Name (_ADR, 0x00000008)
244 Method (_RMV, 0, NotSerialized)
245 {
246 Return (1)
247 }
248 }
249 } /* Device (SDXC) */
250 }