1 /* SPDX-License-Identifier: GPL-2.0-only */
3 External (\_SB.CP00._PSS, PkgObj)
4 External (\_SB.CP00._TSS, PkgObj)
5 External (\_SB.CP00._TPC, MethodObj)
6 External (\_SB.CP00._PTC, PkgObj)
7 External (\_SB.CP00._TSD, PkgObj)
8 External (\_SB.MPDL, IntObj)
10 Device (DPTF_CPU_DEVICE)
12 Name(_ADR, DPTF_CPU_ADDR)
24 * Processor Throttling Controls
29 If (CondRefOf (\_SB.CP00._TSS)) {
30 Return (\_SB.CP00._TSS)
34 Package () { 0, 0, 0, 0, 0 }
41 If (CondRefOf (\_SB.CP00._TPC)) {
42 Return (\_SB.CP00._TPC)
50 If (CondRefOf (\_SB.CP00._PTC)) {
51 Return (\_SB.CP00._PTC)
63 If (CondRefOf (\_SB.CP00._TSD)) {
64 Return (\_SB.CP00._TSD)
68 Package () { 5, 0, 0, 0, 0 }
75 If (CondRefOf (\_SB.CP00._TSS)) {
76 Local0 = SizeOf (\_SB.CP00._TSS)
85 * Processor Performance Control
97 /* Notify OS to re-read _PPC limit on each CPU */
103 If (CondRefOf (\_SB.CP00._PSS)) {
104 Return (\_SB.CP00._PSS)
108 Package () { 0, 0, 0, 0, 0, 0 }
116 /* Check for mainboard specific _PDL override */
117 If (CondRefOf (\_SB.MPDL)) {
119 } ElseIf (CondRefOf (\_SB.CP00._PSS)) {
120 Local0 = SizeOf (\_SB.CP00._PSS)
128 /* Return PPCC table defined by mainboard */
134 #ifdef DPTF_CPU_CRITICAL
137 Return (\_SB.DPTF.CTOK (DPTF_CPU_CRITICAL))
141 #ifdef DPTF_CPU_PASSIVE
144 Return (\_SB.DPTF.CTOK (DPTF_CPU_PASSIVE))
148 #ifdef DPTF_CPU_ACTIVE_AC0
151 Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC0))
155 #ifdef DPTF_CPU_ACTIVE_AC1
158 Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC1))
162 #ifdef DPTF_CPU_ACTIVE_AC2
165 Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC2))
169 #ifdef DPTF_CPU_ACTIVE_AC3
172 Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC3))
176 #ifdef DPTF_CPU_ACTIVE_AC4
179 Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC4))