src/soc/intel/common/block/include/intelblocks/cfg.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef SOC_INTEL_COMMON_BLOCK_CFG_H
   4 #define SOC_INTEL_COMMON_BLOCK_CFG_H
   5
   6 #include <boot/coreboot_tables.h>
   7 #include <intelblocks/gspi.h>
   8 #include <drivers/i2c/designware/dw_i2c.h>
   9 #include <intelblocks/mmc.h>
  10
  11 enum {
  12         CHIPSET_LOCKDOWN_COREBOOT = 0,  /* coreboot handles locking */
  13         CHIPSET_LOCKDOWN_FSP,           /* FSP handles locking per UPDs */
  14 };
  15
  16 /*
  17  * This structure will hold data required by common blocks.
  18  * These are soc specific configurations which will be filled by soc.
  19  * We'll fill this structure once during init and use the data in common block.
  20  */
  21 struct soc_intel_common_config {
  22         int chipset_lockdown;
  23         struct gspi_cfg gspi[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX];
  24         struct dw_i2c_bus_config i2c[CONFIG_SOC_INTEL_I2C_DEV_MAX];
  25         /* PCH Thermal Trip Temperature in deg C */
  26         uint8_t pch_thermal_trip;
  27         struct mmc_dll_params emmc_dll;
  28         enum lb_fb_orientation panel_orientation;
  29 };
  30
  31 /* This function to retrieve soc config structure required by common code */
  32 struct soc_intel_common_config *chip_get_common_soc_structure(void);
  33
  34 #endif /* SOC_INTEL_COMMON_BLOCK_CFG_H */