src/soc/intel/common/block/include/intelblocks/thermal.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef _SOC_INTEL_COMMON_BLOCK_THERMAL_H_
   4 #define _SOC_INTEL_COMMON_BLOCK_THERMAL_H_
   5
   6 #define MAX_TRIP_TEMP 205
   7 /* This is the safest default Trip Temp value */
   8 #define DEFAULT_TRIP_TEMP 50
   9
  10 #if CONFIG(SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV)
  11   /* Trip Point Temp = (LTT / 2 - 50 degree C) */
  12   #define GET_LTT_VALUE(x) (((x) + 50) * (2))
  13 #elif CONFIG(SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC)
  14   /*
  15    * Trip Point = T2L | T1L | T0L where T2L > T1L > T0L
  16    * T2L = Bit 28:20
  17    * T1L = Bit 18:10
  18    * T0L = Bit 8:0
  19    */
  20   #define GET_LTT_VALUE(x) (((x) + 10) << 20 | ((x) + 5) << 10 | (x))
  21 #else
  22   #error <Undefined: GET_LTT_VALUE macro>
  23 #endif
  24
  25 /* Catastrophic Trip Point Enable */
  26 #define PMC_PWRM_THERMAL_CTEN                   0x150c
  27 /* Policy Lock-Down Bit */
  28 #define  PMC_PWRM_THERMAL_CTEN_CTENLOCK         (1 << 31)
  29 /* Catastrophic Power-Down Enable */
  30 #define  PMC_PWRM_THERMAL_CTEN_CPDEN            (1 << 0)
  31 /* EC Thermal Sensor Reporting Enable */
  32 #define PMC_PWRM_THERMAL_ECRPTEN                0x1510
  33 /* Lock-Down Bit */
  34 #define  PMC_PWRM_THERMAL_ECRPTEN_ECRPTENLOCK   (1 << 31)
  35 /* Enable PMC to EC Temp Reporting */
  36 #define  PMC_PWRM_THERMAL_ECRPTEN_EN_RPT        (1 << 0)
  37 /* Throttle Levels */
  38 #define PMC_PWRM_THERMAL_TL                     0x1520
  39 /* TL LOCK */
  40 #define  PMC_PWRM_THERMAL_TL_TLLOCK             (1 << 31)
  41 /* TT Enable */
  42 #define  PMC_PWRM_THERMAL_TL_TTEN               (1 << 29)
  43 /* Throttle Levels Enable */
  44 #define PMC_PWRM_THERMAL_TLEN                   0x1528
  45 /* TLENLOCK */
  46 #define  PMC_PWRM_THERMAL_TLEN_TLENLOCK         (1 << 31)
  47 /* PCH Hot Level Control */
  48 #define PMC_PWRM_THERMAL_PHLC                   0x1540
  49 /* PHL Lock */
  50 #define  PMC_PWRM_THERMAL_PHLC_PHLCLOCK         (1 << 31)
  51
  52 /* Get PCH Thermal Trip from common chip config */
  53 uint8_t get_thermal_trip_temp(void);
  54 /* PCH Low Temp Threshold (LTT) */
  55 uint32_t pch_get_ltt_value(void);
  56 /* Enable thermal sensor power management */
  57 void pch_thermal_configuration(void);
  58
  59 #endif