src/soc/intel/common/block/lpc/lpc_def.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #ifndef _SOC_COMMON_BLOCK_LPC_DEF_H_
   4 #define _SOC_COMMON_BLOCK_LPC_DEF_H_
   5
   6 #define LPC_SERIRQ_CTL                  0x64
   7 #define  LPC_SCNT_EN                    (1 << 7)
   8 #define  LPC_SCNT_MODE                  (1 << 6)
   9 #define LPC_IO_DECODE                   0x80
  10 #define  LPC_IOD_FDD_RANGE              (0 << 12)
  11 #define  LPC_IOD_FDD_RANGE_MASK         (1 << 12)
  12 #define  LPC_IOD_LPT_RANGE              (0 << 8)
  13 #define  LPC_IOD_LPT_RANGE_MASK         (3 << 8)
  14 #define  LPC_IOD_COMA_RANGE_MASK        (7 << 0)
  15 #define  LPC_IOD_COMB_RANGE_MASK        (7 << 4)
  16 #define  LPC_IOD_COMA_RANGE             (0 << 0) /* 0x3F8 - 0x3FF COMA */
  17 #define  LPC_IOD_COMB_RANGE             (1 << 4) /* 0x2F8 - 0x2FF COMB */
  18 /* Use IO_<peripheral>_<IO port> style macros defined in lpc_lib.h
  19  * to enable decoding of I/O locations for a peripheral. */
  20 #define LPC_IO_ENABLES                  0x82
  21 #define LPC_GENERIC_IO_RANGE(n)         ((((n) & 0x3) * 4) + 0x84)
  22 #define  LPC_LGIR_AMASK_MASK            (0xfc << 16)
  23 #define  LPC_LGIR_ADDR_MASK             0xfffc
  24 #define  LPC_LGIR_EN                    (1 << 0)
  25 #define LPC_LGIR_MAX_WINDOW_SIZE        256
  26 #define LPC_GENERIC_MEM_RANGE           0x98
  27 #define  LPC_LGMR_ADDR_MASK             0xffff0000
  28 #define  LPC_LGMR_EN                    (1 << 0)
  29 #define LPC_LGMR_WINDOW_SIZE            (64 * KiB)
  30 #define LPC_BIOS_DECODE_EN              0xd8
  31 #define  LPC_BIOS_DECODE_LOCK           (1 << 31)
  32 #define LPC_BIOS_CNTL                   0xdc
  33 #define  LPC_BC_BILD                    (1 << 7) /* BILD */
  34 #define  LPC_BC_LE                      (1 << 1) /* LE */
  35 #define  LPC_BC_WPD                     (1 << 0) /* WPD */
  36 #define  LPC_BC_EISS                    (1 << 5) /* EISS */
  37 #define LPC_PCCTL                       0xE0 /* PCI Clock Control */
  38 #define  LPC_PCCTL_CLKRUN_EN            (1 << 0)
  39
  40 #endif /* _SOC_COMMON_BLOCK_LPC_DEF_H_ */