libpayload: configs: Add new config.featuretest to broaden CI
[coreboot.git] / src / soc / intel / common / block / tracehub / tracehub.c
blobba56c4c6fc319d1bd71665fcef2cac5095770725
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <device/pci.h>
5 #include <device/pci_ids.h>
6 #include <fsp/util.h>
8 static const uint8_t fsp_tracehub_guid[16] = {
9 0x09, 0x59, 0xb3, 0x5f, 0x1c, 0x5a, 0x31, 0x4a,
10 0xad, 0xaf, 0x57, 0x7b, 0x54, 0x68, 0x26, 0x3f,
13 static void tracehub_read_resources(struct device *dev)
15 const struct hob_resource *tracehub_info_hob;
17 /* Read standard PCI resources. */
18 pci_dev_read_resources(dev);
21 * Find the Trace Hub HOB generated by Intel FSP. If the Trace Hub
22 * is configured to save data in DRAM, FSP will generate this HOB.
23 * This HOB contains address and length of the memory region used
24 * by Trace Hub to save traces. Mark this memory region as reserved.
26 tracehub_info_hob = fsp_find_resource_hob_by_guid(fsp_tracehub_guid);
27 if (!tracehub_info_hob) {
28 printk(BIOS_INFO, "Trace Hub HOB not found\n");
29 return;
31 printk(BIOS_DEBUG, "Trace Hub HOB found: addr=0x%08llx length=0x%08llx\n",
32 tracehub_info_hob->addr, tracehub_info_hob->length);
33 reserved_ram_range(dev, 0, tracehub_info_hob->addr,
34 tracehub_info_hob->length);
37 static struct device_operations dev_ops = {
38 .read_resources = tracehub_read_resources,
39 .set_resources = pci_dev_set_resources,
40 .enable_resources = pci_dev_enable_resources,
41 .ops_pci = &pci_dev_ops_pci,
44 static const unsigned short pci_device_ids[] = {
45 PCI_DID_INTEL_PTL_H_TRACEHUB,
46 PCI_DID_INTEL_PTL_U_H_TRACEHUB,
47 PCI_DID_INTEL_MTL_TRACEHUB,
48 PCI_DID_INTEL_RPL_TRACEHUB,
52 static const struct pci_driver tracehub_driver __pci_driver = {
53 .ops = &dev_ops,
54 .vendor = PCI_VID_INTEL,
55 .devices = pci_device_ids,