1 /* SPDX-License-Identifier: GPL-2.0-only */
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/pci_ops.h>
7 #include <intelblocks/power_limit.h>
8 #include <intelblocks/systemagent.h>
10 #include <soc/soc_chip.h>
11 #include <soc/systemagent.h>
17 * Add all known fixed memory ranges for Host Controller/Memory
20 void soc_add_fixed_mmio_resources(struct device
*dev
, int *index
)
22 static const struct sa_mmio_descriptor soc_fixed_resources
[] = {
23 { PCIEXBAR
, CONFIG_ECAM_MMCONF_BASE_ADDRESS
, CONFIG_ECAM_MMCONF_LENGTH
,
25 { MCHBAR
, MCH_BASE_ADDRESS
, MCH_BASE_SIZE
, "MCHBAR" },
26 { DMIBAR
, DMI_BASE_ADDRESS
, DMI_BASE_SIZE
, "DMIBAR" },
27 { EPBAR
, EP_BASE_ADDRESS
, EP_BASE_SIZE
, "EPBAR" },
28 { REGBAR
, REG_BASE_ADDRESS
, REG_BASE_SIZE
, "REGBAR" },
29 { EDRAMBAR
, EDRAM_BASE_ADDRESS
, EDRAM_BASE_SIZE
, "EDRAMBAR" },
32 sa_add_fixed_mmio_resources(dev
, index
, soc_fixed_resources
,
33 ARRAY_SIZE(soc_fixed_resources
));
35 /* Add Vt-d resources if VT-d is enabled */
36 if ((pci_read_config32(dev
, CAPID0_A
) & VTD_DISABLE
))
39 sa_add_fixed_mmio_resources(dev
, index
, soc_vtd_resources
,
40 ARRAY_SIZE(soc_vtd_resources
));
46 * Perform System Agent Initialization during Ramstage phase.
48 void soc_systemagent_init(struct device
*dev
)
50 struct soc_power_limits_config
*soc_config
;
53 /* Enable Power Aware Interrupt Routing */
54 enable_power_aware_intr();
56 /* Enable BIOS Reset CPL */
57 enable_bios_reset_cpl();
61 config
= config_of_soc();
62 soc_config
= &config
->power_limits_config
;
63 set_power_limits(MOBILE_SKU_PL1_TIME_SEC
, soc_config
);