src/soc/intel/pantherlake/elog.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <bootstate.h>
   4 #include <console/console.h>
   5 #include <device/pci_ops.h>
   6 #include <elog.h>
   7 #include <intelblocks/pmclib.h>
   8 #include <intelblocks/xhci.h>
   9 #include <soc/pci_devs.h>
  10 #include <soc/pm.h>
  11 #include <types.h>
  12
  13 struct pme_map {
  14         unsigned int devfn;
  15         unsigned int wake_source;
  16 };
  17
  18 static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
  19 {
  20         int i;
  21
  22         gpe0_sts &= gpe0_en;
  23
  24         for (i = 0; i <= 31; i++) {
  25                 if (gpe0_sts & (1 << i))
  26                         elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start);
  27         }
  28 }
  29
  30 static void pch_log_rp_wake_source(void)
  31 {
  32         const struct pme_map pme_map[] = {
  33                 { PCI_DEVFN_PCIE1,      ELOG_WAKE_SOURCE_PME_PCIE1 },
  34                 { PCI_DEVFN_PCIE2,      ELOG_WAKE_SOURCE_PME_PCIE2 },
  35                 { PCI_DEVFN_PCIE3,      ELOG_WAKE_SOURCE_PME_PCIE3 },
  36                 { PCI_DEVFN_PCIE4,      ELOG_WAKE_SOURCE_PME_PCIE4 },
  37                 { PCI_DEVFN_PCIE5,      ELOG_WAKE_SOURCE_PME_PCIE5 },
  38                 { PCI_DEVFN_PCIE6,      ELOG_WAKE_SOURCE_PME_PCIE6 },
  39                 { PCI_DEVFN_PCIE7,      ELOG_WAKE_SOURCE_PME_PCIE7 },
  40                 { PCI_DEVFN_PCIE8,      ELOG_WAKE_SOURCE_PME_PCIE8 },
  41                 { PCI_DEVFN_PCIE9,      ELOG_WAKE_SOURCE_PME_PCIE9 },
  42                 { PCI_DEVFN_PCIE10,     ELOG_WAKE_SOURCE_PME_PCIE10 },
  43 #if CONFIG(SOC_INTEL_PANTHERLAKE_U_H)
  44                 { PCI_DEVFN_PCIE11,     ELOG_WAKE_SOURCE_PME_PCIE11 },
  45                 { PCI_DEVFN_PCIE12,     ELOG_WAKE_SOURCE_PME_PCIE12 },
  46 #endif
  47         };
  48
  49         for (size_t i = 0; i < MIN(CONFIG_MAX_ROOT_PORTS, ARRAY_SIZE(pme_map)); i++) {
  50                 if (pci_dev_is_wake_source(PCI_DEV(0, PCI_SLOT(pme_map[i].devfn),
  51                                                    PCI_FUNC(pme_map[i].devfn))))
  52                         elog_add_event_wake(pme_map[i].wake_source, 0);
  53         }
  54 }
  55
  56 static void pch_log_pme_internal_wake_source(void)
  57 {
  58         const struct pme_map ipme_map[] = {
  59                 { PCI_DEVFN_HDA,        ELOG_WAKE_SOURCE_PME_HDA },
  60                 { PCI_DEVFN_GBE,        ELOG_WAKE_SOURCE_PME_GBE },
  61                 { PCI_DEVFN_CSE,        ELOG_WAKE_SOURCE_PME_CSE },
  62                 { PCI_DEVFN_XHCI,       ELOG_WAKE_SOURCE_PME_XHCI },
  63                 { PCI_DEVFN_USBOTG,     ELOG_WAKE_SOURCE_PME_XDCI },
  64                 { PCI_DEVFN_CNVI_WIFI,  ELOG_WAKE_SOURCE_PME_WIFI },
  65                 { PCI_DEVFN_TCSS_XDCI,  ELOG_WAKE_SOURCE_PME_TCSS_XDCI },
  66         };
  67         const struct xhci_wake_info xhci_wake_info[] = {
  68                 { PCI_DEVFN_XHCI,       ELOG_WAKE_SOURCE_PME_XHCI },
  69                 { PCI_DEVFN_TCSS_XHCI,  ELOG_WAKE_SOURCE_PME_TCSS_XHCI },
  70         };
  71         bool dev_found = false;
  72         size_t i;
  73
  74         for (i = 0; i < ARRAY_SIZE(ipme_map); i++) {
  75                 unsigned int devfn = ipme_map[i].devfn;
  76                 if (pci_dev_is_wake_source(PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)))) {
  77                         elog_add_event_wake(ipme_map[i].wake_source, 0);
  78                         dev_found = true;
  79                 }
  80         }
  81
  82         /* Check Thunderbolt ports */
  83         for (i = 0; i < NUM_TBT_FUNCTIONS; i++) {
  84                 unsigned int devfn = PCI_DEVFN_TBT(i);
  85                 if (pci_dev_is_wake_source(PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)))) {
  86                         elog_add_event_wake(ELOG_WAKE_SOURCE_PME_TBT, i);
  87                         dev_found = true;
  88                 }
  89         }
  90
  91         /* Check DMA devices */
  92         for (i = 0; i < NUM_TCSS_DMA_FUNCTIONS; i++) {
  93                 unsigned int devfn = PCI_DEVFN_TCSS_DMA(i);
  94                 if (pci_dev_is_wake_source(PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)))) {
  95                         elog_add_event_wake(ELOG_WAKE_SOURCE_PME_TCSS_DMA, i);
  96                         dev_found = true;
  97                 }
  98         }
  99
 100         /*
 101          * Probe the XHCI controllers and their USB2 and USB3 ports to determine
 102          * if any of them were wake sources.
 103          */
 104         dev_found |= xhci_update_wake_event(xhci_wake_info, ARRAY_SIZE(xhci_wake_info));
 105
 106         if (!dev_found)
 107                 elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL, 0);
 108 }
 109
 110 static void pch_log_wake_source(struct chipset_power_state *ps)
 111 {
 112         /* Power Button */
 113         if (ps->pm1_sts & PWRBTN_STS)
 114                 elog_add_event_wake(ELOG_WAKE_SOURCE_PWRBTN, 0);
 115
 116         /* RTC */
 117         if (ps->pm1_sts & RTC_STS)
 118                 elog_add_event_wake(ELOG_WAKE_SOURCE_RTC, 0);
 119
 120         /* PCI Express */
 121         if (ps->pm1_sts & PCIEXPWAK_STS)
 122                 pch_log_rp_wake_source();
 123
 124         /* PME (TODO: determine wake device) */
 125         if (ps->gpe0_sts[GPE_STD] & PME_STS)
 126                 elog_add_event_wake(ELOG_WAKE_SOURCE_PME, 0);
 127
 128         /* Internal PME */
 129         if (ps->gpe0_sts[GPE_STD] & PME_B0_STS)
 130                 pch_log_pme_internal_wake_source();
 131
 132         /* SMBUS Wake */
 133         if (ps->gpe0_sts[GPE_STD] & SMB_WAK_STS)
 134                 elog_add_event_wake(ELOG_WAKE_SOURCE_SMBUS, 0);
 135
 136         /* Log GPIO events in set 1-3 */
 137         pch_log_gpio_gpe(ps->gpe0_sts[GPE_31_0], ps->gpe0_en[GPE_31_0], 0);
 138         pch_log_gpio_gpe(ps->gpe0_sts[GPE_63_32], ps->gpe0_en[GPE_63_32], 32);
 139         pch_log_gpio_gpe(ps->gpe0_sts[GPE_95_64], ps->gpe0_en[GPE_95_64], 64);
 140         /* Treat the STD as an extension of GPIO to obtain visibility. */
 141         pch_log_gpio_gpe(ps->gpe0_sts[GPE_STD], ps->gpe0_en[GPE_STD], 96);
 142 }
 143
 144 static void pch_log_power_and_resets(const struct chipset_power_state *ps)
 145 {
 146         /* Thermal Trip */
 147         if (ps->gblrst_cause[0] & GBLRST_CAUSE0_THERMTRIP)
 148                 elog_add_event(ELOG_TYPE_THERM_TRIP);
 149
 150         /* CSME-Initiated Host Reset with power down */
 151         if (ps->hpr_cause0 & HPR_CAUSE0_MI_HRPD)
 152                 elog_add_event(ELOG_TYPE_MI_HRPD);
 153
 154         /* CSME-Initiated Host Reset with power cycle */
 155         if (ps->hpr_cause0 & HPR_CAUSE0_MI_HRPC)
 156                 elog_add_event(ELOG_TYPE_MI_HRPC);
 157
 158         /* CSME-Initiated Host Reset without power cycle */
 159         if (ps->hpr_cause0 & HPR_CAUSE0_MI_HR)
 160                 elog_add_event(ELOG_TYPE_MI_HR);
 161
 162         /* PWR_FLR Power Failure */
 163         if (ps->gen_pmcon_a & PWR_FLR)
 164                 elog_add_event(ELOG_TYPE_POWER_FAIL);
 165
 166         /* SUS Well Power Failure */
 167         if (ps->gen_pmcon_a & SUS_PWR_FLR)
 168                 elog_add_event(ELOG_TYPE_SUS_POWER_FAIL);
 169
 170         /* TCO Timeout */
 171         if (ps->prev_sleep_state != ACPI_S3 &&
 172             ps->tco2_sts & TCO2_STS_SECOND_TO)
 173                 elog_add_event(ELOG_TYPE_TCO_RESET);
 174
 175         /* Power Button Override */
 176         if (ps->pm1_sts & PRBTNOR_STS)
 177                 elog_add_event(ELOG_TYPE_POWER_BUTTON_OVERRIDE);
 178
 179         /* RTC reset */
 180         if (ps->gen_pmcon_b & RTC_BATTERY_DEAD)
 181                 elog_add_event(ELOG_TYPE_RTC_RESET);
 182
 183         /* Host Reset Status */
 184         if (ps->gen_pmcon_a & HOST_RST_STS)
 185                 elog_add_event(ELOG_TYPE_SYSTEM_RESET);
 186
 187         /* ACPI Wake Event */
 188         if (ps->prev_sleep_state != ACPI_S0)
 189                 elog_add_event_byte(ELOG_TYPE_ACPI_WAKE, ps->prev_sleep_state);
 190 }
 191
 192 static void pch_log_state(void *unused)
 193 {
 194         struct chipset_power_state *ps = pmc_get_power_state();
 195
 196         if (!ps) {
 197                 printk(BIOS_ERR, "chipset_power_state not found!\n");
 198                 return;
 199         }
 200
 201         /* Power and Reset */
 202         pch_log_power_and_resets(ps);
 203
 204         /* Wake Sources */
 205         if (ps->prev_sleep_state > ACPI_S0)
 206                 pch_log_wake_source(ps);
 207 }
 208
 209 BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, pch_log_state, NULL);
 210
 211 void elog_gsmi_cb_platform_log_wake_source(void)
 212 {
 213         struct chipset_power_state ps;
 214         pmc_fill_pm_reg_info(&ps);
 215         pch_log_wake_source(&ps);
 216 }