src/soc/intel/snowridge/smihandler.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <intelblocks/fast_spi.h>
   4 #include <intelblocks/smihandler.h>
   5 #include <soc/pm.h>
   6
   7 void smihandler_soc_at_finalize(void)
   8 {
   9         fast_spi_enable_wp();
  10 }
  11
  12 const smi_handler_t southbridge_smi[SMI_STS_BITS] = {
  13         [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep,
  14         [APM_STS_BIT] = smihandler_southbridge_apmc,
  15         [PM1_STS_BIT] = smihandler_southbridge_pm1,
  16         [GPE0_STS_BIT] = smihandler_southbridge_gpe0,
  17         [GPIO_STS_BIT] = smihandler_southbridge_gpi,
  18         [ESPI_SMI_STS_BIT] = smihandler_southbridge_espi,
  19         [MCSMI_STS_BIT] = smihandler_southbridge_mc,
  20 #if CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE)
  21         [TCO_STS_BIT] = smihandler_southbridge_tco,
  22 #endif
  23         [PERIODIC_STS_BIT] = smihandler_southbridge_periodic,
  24         [MONITOR_STS_BIT] = smihandler_southbridge_monitor
  25 };