1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpigen.h>
4 #include <arch/smp/mpspec.h>
6 #include <cpu/intel/turbo.h>
7 #include <device/mmio.h>
8 #include <device/pci.h>
9 #include <intelblocks/acpi.h>
11 #include <soc/iomap.h>
13 #include <soc/pci_devs.h>
15 #include <soc/soc_util.h>
18 int soc_madt_sci_irq_polarity(int sci
)
21 return MP_IRQ_POLARITY_LOW
;
23 return MP_IRQ_POLARITY_HIGH
;
26 uint32_t soc_read_sci_irq_select(void)
28 struct device
*dev
= PCH_DEV_PMC
;
33 return pci_read_config32(dev
, PMC_ACPI_CNT
);
36 void soc_fill_fadt(acpi_fadt_t
*fadt
)
38 const uint16_t pmbase
= ACPI_BASE_ADDRESS
;
40 /* Fix flags set by common/block/acpi/acpi.c acpi_fill_fadt() */
41 fadt
->flags
&= ~(ACPI_FADT_SEALED_CASE
);
42 fadt
->flags
|= ACPI_FADT_SLEEP_TYPE
;
44 fadt
->pm2_cnt_blk
= pmbase
+ PM2_CNT
;
45 fadt
->pm_tmr_blk
= pmbase
+ PM1_TMR
;
47 fadt
->pm2_cnt_len
= 1;
50 fadt
->iapc_boot_arch
= ACPI_FADT_LEGACY_DEVICES
;
52 /* PM Extended Registers */
53 fill_fadt_extended_pm_io(fadt
);
56 void soc_power_states_generation(int core_id
, int cores_per_package
)
58 generate_p_state_entries(core_id
, cores_per_package
);