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HEAD
drivers/amd/opensil: Add openSIL timepoint calls
[coreboot.git]
/
src
/
superio
/
fintek
/
common
/
Kconfig
blob
a0ba6d46f602b8d7be7d4c9df58001de7d2f4560
1
# SPDX-License-Identifier: GPL-2.0-only
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# Generic Fintek romstage driver - Just enough UART initialisation code for
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# romstage.
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config SUPERIO_FINTEK_COMMON_PRE_RAM
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bool