src/superio/fintek/f71869ad/superio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <device/device.h>
   4 #include <device/pnp.h>
   5 #include <superio/conf_mode.h>
   6 #include <pc80/keyboard.h>
   7
   8 #include "fintek_internal.h"
   9 #include "chip.h"
  10 #include "f71869ad.h"
  11
  12 static void f71869ad_init(struct device *dev)
  13 {
  14         if (!dev->enabled)
  15                 return;
  16
  17         switch (dev->path.pnp.device) {
  18         /* TODO: Might potentially need code for HWM or FDC etc. */
  19         case F71869AD_KBC:
  20                 pc_keyboard_init(NO_AUX_DEVICE);
  21                 break;
  22         case F71869AD_HWM:
  23                 f71869ad_multifunc_init(dev);
  24                 f71869ad_hwm_init(dev);
  25                 break;
  26         }
  27 }
  28
  29 static struct device_operations ops = {
  30         .read_resources   = pnp_read_resources,
  31         .set_resources    = pnp_set_resources,
  32         .enable_resources = pnp_enable_resources,
  33         .enable           = pnp_alt_enable,
  34         .init             = f71869ad_init,
  35         .ops_pnp_mode     = &pnp_conf_mode_8787_aa,
  36 };
  37
  38 /*
  39  * io_info contains the mask 0x07f8. Given 8 register, each 8 bits wide of a
  40  * logical device we need a mask of the following form:
  41  *
  42  *  MSB                 LSB
  43  *    v                 v
  44  * 0x[15..11][10..3][2..0]
  45  *    ------  ^^^^^  ^^^^
  46  *    null      |      |
  47  *              |      +------ Register index
  48  *              |
  49  *              +------------- Compare against base address and
  50  *                             asserts a chip_select on match.
  51  *
  52  *  i.e., 0x07F8 = [00000][11111111][000]
  53  *
  54  * NOTE: Be sure to set these in your devicetree.cb, i.e.
  55  *
  56  *                      chip superio/fintek/f71869ad
  57  *                              device pnp 4e.00 off        # Floppy
  58  *                                      io 0x60 = 0x3f0
  59  *                                      irq 0x70 = 6
  60  *                                      drq 0x74 = 2
  61  *                              end
  62  *                              device pnp 4e.01 on         # COM1
  63  *                                      io 0x60 = 0x3f8
  64  *                                      irq 0x70 = 4
  65  *                              end
  66  *                                      device pnp 4e.02 off    # COM2
  67  *                                      io 0x60 = 0x2f8
  68  *                                      irq 0x70 = 3
  69  *                              end
  70  *                              device pnp 4e.03 off        # Parallel Port
  71  *                                      io 0x60 = 0x378
  72  *                                      irq 0x70 = 7
  73  *                                      drq 0x74 = 3
  74  *                              end
  75  *                              device pnp 4e.04 on         # Hardware Monitor
  76  *                                      io 0x60 = 0x295
  77  *                                      irq 0x70 = 0
  78  *                              end
  79  *                              device pnp 4e.05 on         # KBC
  80  *                                      io 0x60 = 0x060
  81  *                                      irq 0x70 = 1            # Keyboard IRQ
  82  *                                      irq 0x72 = 12           # Mouse IRQ
  83  *                              end
  84  *                              device pnp 4e.06 off end    # GPIO
  85  *                              device pnp 4e.07 on end     # WDT
  86  *                              device pnp 4e.08 off end    # CIR
  87  *                              device pnp 4e.0a on end     # PME
  88  *                      end # f71869ad
  89  *
  90  */
  91 static struct pnp_info pnp_dev_info[] = {
  92         { NULL, F71869AD_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
  93         { NULL, F71869AD_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },
  94         { NULL, F71869AD_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },
  95         { NULL, F71869AD_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
  96         { NULL, F71869AD_HWM,  PNP_IO0 | PNP_IRQ0, 0x0ff8, },
  97         { NULL, F71869AD_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
  98         { NULL, F71869AD_GPIO, },
  99         { NULL, F71869AD_WDT, },
 100         { NULL, F71869AD_CIR,  PNP_IO0 | PNP_IRQ0, 0x07f8, },
 101         { NULL, F71869AD_PME, },
 102 };
 103
 104 static void enable_dev(struct device *dev)
 105 {
 106         pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
 107 }
 108
 109 struct chip_operations superio_fintek_f71869ad_ops = {
 110         .name = "Fintek F71869AD Super I/O",
 111         .enable_dev = enable_dev
 112 };