mb/google/brox/var/jubilant: Disable Tccold Handshake
[coreboot.git] / util / inteltool / rootcmplx.c
blob87fa38ffbc16bf5b47c1e872014e2a1449d587b6
1 /* inteltool - dump all registers on an Intel CPU + chipset based system */
2 /* SPDX-License-Identifier: GPL-2.0-only */
4 #include <stdio.h>
5 #include <stdlib.h>
6 #include "inteltool.h"
8 int print_rcba(struct pci_dev *sb)
10 int i, size = 0x4000;
11 volatile uint8_t *rcba;
12 uint32_t rcba_phys;
14 printf("\n============= RCBA ==============\n\n");
16 switch (sb->device_id) {
17 case PCI_DEVICE_ID_INTEL_ICH6:
18 case PCI_DEVICE_ID_INTEL_ICH7:
19 case PCI_DEVICE_ID_INTEL_ICH7M:
20 case PCI_DEVICE_ID_INTEL_ICH7DH:
21 case PCI_DEVICE_ID_INTEL_ICH7MDH:
22 case PCI_DEVICE_ID_INTEL_ICH8:
23 case PCI_DEVICE_ID_INTEL_ICH8M:
24 case PCI_DEVICE_ID_INTEL_ICH8ME:
25 case PCI_DEVICE_ID_INTEL_ICH9DH:
26 case PCI_DEVICE_ID_INTEL_ICH9DO:
27 case PCI_DEVICE_ID_INTEL_ICH9R:
28 case PCI_DEVICE_ID_INTEL_ICH9:
29 case PCI_DEVICE_ID_INTEL_ICH9M:
30 case PCI_DEVICE_ID_INTEL_ICH9ME:
31 case PCI_DEVICE_ID_INTEL_ICH10:
32 case PCI_DEVICE_ID_INTEL_ICH10D:
33 case PCI_DEVICE_ID_INTEL_ICH10DO:
34 case PCI_DEVICE_ID_INTEL_ICH10R:
35 case PCI_DEVICE_ID_INTEL_NM10:
36 case PCI_DEVICE_ID_INTEL_I63XX:
37 case PCI_DEVICE_ID_INTEL_3400:
38 case PCI_DEVICE_ID_INTEL_3420:
39 case PCI_DEVICE_ID_INTEL_3450:
40 case PCI_DEVICE_ID_INTEL_3400_DESKTOP:
41 case PCI_DEVICE_ID_INTEL_3400_MOBILE:
42 case PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF:
43 case PCI_DEVICE_ID_INTEL_B55_A:
44 case PCI_DEVICE_ID_INTEL_B55_B:
45 case PCI_DEVICE_ID_INTEL_H55:
46 case PCI_DEVICE_ID_INTEL_H57:
47 case PCI_DEVICE_ID_INTEL_HM55:
48 case PCI_DEVICE_ID_INTEL_HM57:
49 case PCI_DEVICE_ID_INTEL_P55:
50 case PCI_DEVICE_ID_INTEL_PM55:
51 case PCI_DEVICE_ID_INTEL_Q57:
52 case PCI_DEVICE_ID_INTEL_QM57:
53 case PCI_DEVICE_ID_INTEL_QS57:
54 case PCI_DEVICE_ID_INTEL_Z68:
55 case PCI_DEVICE_ID_INTEL_P67:
56 case PCI_DEVICE_ID_INTEL_UM67:
57 case PCI_DEVICE_ID_INTEL_HM65:
58 case PCI_DEVICE_ID_INTEL_H67:
59 case PCI_DEVICE_ID_INTEL_HM67:
60 case PCI_DEVICE_ID_INTEL_Q65:
61 case PCI_DEVICE_ID_INTEL_QS67:
62 case PCI_DEVICE_ID_INTEL_Q67:
63 case PCI_DEVICE_ID_INTEL_QM67:
64 case PCI_DEVICE_ID_INTEL_B65:
65 case PCI_DEVICE_ID_INTEL_C202:
66 case PCI_DEVICE_ID_INTEL_C204:
67 case PCI_DEVICE_ID_INTEL_C206:
68 case PCI_DEVICE_ID_INTEL_H61:
69 case PCI_DEVICE_ID_INTEL_Z77:
70 case PCI_DEVICE_ID_INTEL_Z75:
71 case PCI_DEVICE_ID_INTEL_Q77:
72 case PCI_DEVICE_ID_INTEL_Q75:
73 case PCI_DEVICE_ID_INTEL_B75:
74 case PCI_DEVICE_ID_INTEL_H77:
75 case PCI_DEVICE_ID_INTEL_C216:
76 case PCI_DEVICE_ID_INTEL_QM77:
77 case PCI_DEVICE_ID_INTEL_QS77:
78 case PCI_DEVICE_ID_INTEL_HM77:
79 case PCI_DEVICE_ID_INTEL_UM77:
80 case PCI_DEVICE_ID_INTEL_HM76:
81 case PCI_DEVICE_ID_INTEL_HM75:
82 case PCI_DEVICE_ID_INTEL_HM70:
83 case PCI_DEVICE_ID_INTEL_NM70:
84 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL:
85 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM:
86 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE:
87 case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_PREM:
88 case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP:
89 case PCI_DEVICE_ID_INTEL_C8_MOBILE:
90 case PCI_DEVICE_ID_INTEL_C8_DESKTOP:
91 case PCI_DEVICE_ID_INTEL_Z87:
92 case PCI_DEVICE_ID_INTEL_Z85:
93 case PCI_DEVICE_ID_INTEL_HM86:
94 case PCI_DEVICE_ID_INTEL_H87:
95 case PCI_DEVICE_ID_INTEL_HM87:
96 case PCI_DEVICE_ID_INTEL_Q85:
97 case PCI_DEVICE_ID_INTEL_Q87:
98 case PCI_DEVICE_ID_INTEL_QM87:
99 case PCI_DEVICE_ID_INTEL_B85:
100 case PCI_DEVICE_ID_INTEL_C222:
101 case PCI_DEVICE_ID_INTEL_C224:
102 case PCI_DEVICE_ID_INTEL_C226:
103 case PCI_DEVICE_ID_INTEL_H81:
104 case PCI_DEVICE_ID_INTEL_C9_MOBILE:
105 case PCI_DEVICE_ID_INTEL_C9_DESKTOP:
106 case PCI_DEVICE_ID_INTEL_HM97:
107 case PCI_DEVICE_ID_INTEL_Z97:
108 case PCI_DEVICE_ID_INTEL_H97:
109 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE:
110 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL:
111 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL:
112 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL:
113 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL:
114 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL:
115 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL:
116 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE:
117 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM:
118 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM:
119 rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
120 break;
121 case PCI_DEVICE_ID_INTEL_ICH:
122 case PCI_DEVICE_ID_INTEL_ICH0:
123 case PCI_DEVICE_ID_INTEL_ICH2:
124 case PCI_DEVICE_ID_INTEL_ICH4:
125 case PCI_DEVICE_ID_INTEL_ICH4M:
126 case PCI_DEVICE_ID_INTEL_ICH5:
127 case PCI_DEVICE_ID_INTEL_ADL_N:
128 printf("This southbridge does not have RCBA.\n");
129 return 1;
130 default:
131 printf("Error: Dumping RCBA on this southbridge is not (yet) supported.\n");
132 return 1;
135 rcba = map_physical(rcba_phys, size);
137 if (rcba == NULL) {
138 perror("Error mapping RCBA");
139 printf("Try booting with iomem=relaxed.\n");
140 exit(1);
143 printf("RCBA = 0x%08x (MEM)\n\n", rcba_phys);
145 for (i = 0; i < size; i += 4) {
146 if (read32(rcba + i))
147 printf("0x%04x: 0x%08x\n", i, read32(rcba + i));
150 print_iobp(sb, rcba);
152 unmap_physical((void *)rcba, size);
153 return 0;