src/mainboard/intel/jasperlake_rvp/dsdt.asl

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <acpi/acpi.h>
   4 #include <baseboard/ec.h>
   5 #include <baseboard/gpio.h>
   6
   7 DefinitionBlock(
   8         "dsdt.aml",
   9         "DSDT",
  10         ACPI_DSDT_REV_2,
  11         OEM_ID,
  12         ACPI_TABLE_CREATOR,
  13         0x20110725      /* OEM revision */
  14 )
  15 {
  16         #include <acpi/dsdt_top.asl>
  17         #include <soc/intel/common/block/acpi/acpi/platform.asl>
  18
  19         /* global NVS and variables */
  20         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
  21
  22         /* CPU */
  23         #include <cpu/intel/common/acpi/cpu.asl>
  24
  25         Scope (\_SB) {
  26                 Device (PCI0)
  27                 {
  28                         #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
  29                         #include <soc/intel/jasperlake/acpi/southbridge.asl>
  30                 }
  31         }
  32
  33 #if CONFIG(EC_GOOGLE_CHROMEEC)
  34         /* Chrome OS Embedded Controller */
  35         Scope (\_SB.PCI0.LPCB)
  36         {
  37                 /* ACPI code for EC SuperIO functions */
  38                 #include <ec/google/chromeec/acpi/superio.asl>
  39                 /* ACPI code for EC functions */
  40                 #include <ec/google/chromeec/acpi/ec.asl>
  41         }
  42 #endif
  43
  44         #include <southbridge/intel/common/acpi/sleepstates.asl>
  45 }