1 /* SPDX-License-Identifier: GPL-2.0-only */
4 #include <tests/test.h>
8 #include <tests/lib/edid.h>
15 static uint8_t get_raw_edid_checksum(const unsigned char *x
)
17 unsigned char sum
= 0;
19 for (i
= 0; i
< 127; ++i
)
25 static void edid_raw_calc_checksum(struct edid_raw
*raw
)
27 raw
->checksum
= get_raw_edid_checksum((const unsigned char *)raw
);
30 static void test_decode_edid_no_edid(void **state
)
32 assert_int_equal(EDID_ABSENT
, decode_edid(NULL
, 0, NULL
));
35 static void test_decode_edid_invalid_header(void **state
)
37 struct edid_raw raw
= {.header
= EDID_HEADER_INVALID_RAW
};
38 raw
.checksum
= get_raw_edid_checksum((const unsigned char *)&raw
);
40 assert_int_equal(EDID_ABSENT
, decode_edid((unsigned char *)&raw
, sizeof(raw
), NULL
));
43 /* Frame is modified example of an LCD Desktop IT display
44 from VESA E-EDID Standard Release A2. */
45 static int setup_decode_edid_basic_frame(void **state
)
47 struct edid_raw raw
= {
48 EDID_RAW_DEFAULT_PARAMS
,
52 | EDID_VIDEO_SETUP_BLANK_EQ_BLACK
53 | EDID_SEPARATE_SYNC_H_AND_V(1)
54 | EDID_COMPOSITE_SYNC_H(1)
55 | EDID_COMPOSITE_SYNC_ON_GREEN(1)
56 | EDID_SERRATION_VSYNC(1),
57 .horizontal_size
= 43, /* [cm] */
58 .vertical_size
= 32, /* [cm] */
59 .display_gamma
= 120, /* 220% */
62 | EDID_SUSPEND_MODE(0)
64 | EDID_COLOR_FORMAT_RGB444
65 | EDID_SRGB_SUPPORTED(0)
66 | EDID_PREFERRED_TIMING_EXTENDED_INFO
67 | EDID_DISPLAY_FREQUENCY_CONTINUOUS
,
68 .established_supported_timings
= {
69 [0] = EDID_ESTABLISHED_TIMINGS_1_720x400_70Hz
70 | EDID_ESTABLISHED_TIMINGS_1_720x400_88Hz
71 | EDID_ESTABLISHED_TIMINGS_1_640x480_60Hz
72 | EDID_ESTABLISHED_TIMINGS_1_640x480_67Hz
73 | EDID_ESTABLISHED_TIMINGS_1_640x480_72Hz
74 | EDID_ESTABLISHED_TIMINGS_1_640x480_75Hz
75 | EDID_ESTABLISHED_TIMINGS_1_800x600_56Hz
76 | EDID_ESTABLISHED_TIMINGS_1_800x600_60Hz
,
77 [1] = EDID_ESTABLISHED_TIMINGS_2_800x600_72Hz
78 | EDID_ESTABLISHED_TIMINGS_2_800x600_75Hz
79 | EDID_ESTABLISHED_TIMINGS_2_832x624_75Hz
80 | EDID_ESTABLISHED_TIMINGS_2_1024x768_80HzI
81 | EDID_ESTABLISHED_TIMINGS_2_1024x768_60Hz
82 | EDID_ESTABLISHED_TIMINGS_2_1024x768_70Hz
83 | EDID_ESTABLISHED_TIMINGS_2_1024x768_75Hz
84 | EDID_ESTABLISHED_TIMINGS_2_1280x1024_75Hz
,
86 .manufacturers_reserved_timing
= EDID_MANUFACTURERS_TIMINGS_1152x870_75Hz
,
87 .standard_timings_supported
= {
88 [0] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1600),
89 [1] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(85),
91 [2] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1600),
92 [3] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(75),
94 [4] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1600),
95 [5] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(70),
97 [6] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1600),
98 [7] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(65),
100 [8] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280),
101 [9] = EDID_ASPECT_RATIO_5_4
| EDID_FIELD_REFRESH_RATE(85),
103 [10] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280),
104 [11] = EDID_ASPECT_RATIO_5_4
| EDID_FIELD_REFRESH_RATE(60),
106 [12] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1024),
107 [13] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(85),
109 [14] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(800),
110 [15] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(85),
112 .descriptor_block_1
= {
113 [0] = EDID_PIXEL_CLOCK(162000000u) & 0xFF,
114 [1] = (EDID_PIXEL_CLOCK(162000000u) >> 8) & 0xFF,
116 /* Horizontal Addressable Video is 1600px,
117 Horizontal Blanking is 560px. */
122 /* Vertical Addressable Video is 1200 lines,
123 Vertical Blanking is 50 lines. */
128 [8] = 64u, /* Horizontal Front Porch in pixels. */
129 [9] = 192u, /* Horizontal Pulse Sync Width in pixels. */
130 [10] = 0x13, /* Vertical Front Porch is 1 line. */
131 [11] = 0x00, /* Vertical Sync Pulse Width is 3 lines. */
133 /* Horizontal Addressable Image Size is 427mm,
134 Vertical Addressable Image Size is 320mm. */
139 [15] = 0x00, /* Horizontal Border Size is 0px. */
140 [16] = 0x00, /* Vertical Border Size is 0px. */
142 /* Timing is Non-Interlaced Video,
143 Stereo Video is not supported,
144 Digital separate syncs are requires. */
147 .descriptor_block_2
= {
148 /* Display Range Limits Block Tag */
154 [4] = 0, /* Horizontal and Vertical Rate Offsets are zero. */
155 [5] = 50u, /* Minimum Vertical Freq is 50Hz. */
156 [6] = 90u, /* Maximum Vertical Freq is 90Hz. */
158 [7] = 30u, /* Minimum Horizontal Freq is 30kHz. */
159 [8] = 110u, /* Maximum Horizontal Freq is 110kHz. */
160 [9] = 23u, /* Maximum Pixel Clock Freq is 230MHz. */
161 [10] = 0x4, /* Begin CVT Support Info */
162 [11] = 0x11, /* Compatible with CVT Version 1.1 */
163 [12] = 0, /* Maximum Pixel Clock Freq remains at 230MHz. */
164 [13] = 200, /* Maximum Active Pixels per Line is 1600. */
165 [14] = 0x90, /* Supported aspect ratios: 4:3, 5:4. */
167 /* Preferred Aspect Ratio is 4:3, Standard CVT Blanking is supported. */
169 [16] = 0x50, /* H. & V. Stretch are supported and Shrinks are not. */
170 [17] = 60u, /* Preferred Refresh Rate is 60Hz. */
172 .descriptor_block_3
= {
173 /* Established Timings III Block Tag */
180 [5] = 10u, /* VESA DMT Standard Version #10 */
188 * 1152x864@75Hz are supported.
196 * 1280x1024@85Hz are supported.
201 * 1400x1050@60Hz (Normal Blanking),
202 * 1400x1050@75Hz are supported.
210 * 1600x1200@70Hz are supported.
216 * 1600x1200@85Hz are supported.
220 /* 1920 timings not supported. */
225 .descriptor_block_4
= {
226 /* Display Product Name Block Tag */
248 .extension_flag
= 0x0, /* No extensions */
251 edid_raw_calc_checksum(&raw
);
253 *state
= malloc(sizeof(struct test_state
));
255 struct test_state ts
= {.data_size
= sizeof(struct edid_raw
),
256 .data
= malloc(sizeof(struct edid_raw
))};
258 memcpy(ts
.data
, &raw
, sizeof(raw
));
259 memcpy(*state
, &ts
, sizeof(ts
));
264 /* Test decoding of EDID frame without extensions. */
265 static void test_decode_edid_basic_frame(void **state
)
268 struct test_state
*ts
= *state
;
270 /* In real-life situations frames often are not 100% conformant,
271 but are at least correct when it comes to key data fields. */
272 assert_int_equal(EDID_CONFORMANT
,
273 decode_edid((unsigned char *)ts
->data
, ts
->data_size
, &out
));
275 assert_int_equal(32, out
.framebuffer_bits_per_pixel
);
276 assert_int_equal(0, out
.panel_bits_per_color
);
277 assert_int_equal(0, out
.panel_bits_per_pixel
);
278 assert_int_equal(0, out
.link_clock
);
279 assert_int_equal(1600, out
.x_resolution
);
280 assert_int_equal(1200, out
.y_resolution
);
281 assert_int_equal(6400, out
.bytes_per_line
);
282 assert_int_equal(0, out
.hdmi_monitor_detected
);
283 assert_int_equal(0, strnlen(out
.ascii_string
, ARRAY_SIZE(out
.ascii_string
)));
284 assert_string_equal(out
.manufacturer_name
, EDID_MANUFACTURER_NAME
);
287 assert_null(out
.mode
.name
);
288 assert_int_equal(162000, out
.mode
.pixel_clock
);
289 assert_int_equal(1, out
.mode
.lvds_dual_channel
);
290 assert_int_equal(0, out
.mode
.refresh
);
291 assert_int_equal(1600, out
.mode
.ha
);
292 assert_int_equal(560, out
.mode
.hbl
);
293 assert_int_equal(64, out
.mode
.hso
);
294 assert_int_equal(192, out
.mode
.hspw
);
295 assert_int_equal(0, out
.mode
.hborder
);
296 assert_int_equal(1200, out
.mode
.va
);
297 assert_int_equal(50, out
.mode
.vbl
);
298 assert_int_equal(1, out
.mode
.vso
);
299 assert_int_equal(0, out
.mode
.vborder
);
300 assert_int_equal(43, out
.mode
.phsync
);
301 assert_int_equal(43, out
.mode
.pvsync
);
302 assert_int_equal(0, out
.mode
.x_mm
);
303 assert_int_equal(0, out
.mode
.y_mm
);
305 assert_int_equal(1, out
.mode_is_supported
[EDID_MODE_640x480_60Hz
]);
306 assert_int_equal(0, out
.mode_is_supported
[EDID_MODE_720x480_60Hz
]);
307 assert_int_equal(0, out
.mode_is_supported
[EDID_MODE_1280x720_60Hz
]);
308 assert_int_equal(0, out
.mode_is_supported
[EDID_MODE_1920x1080_60Hz
]);
311 /* Frame is modified example of base EDID frame with CEA861 extension
312 for DTV Display from VESA E-EDID Standard Release A2. */
313 static int setup_decode_edid_dtv_frame_with_extension(void **state
)
315 struct edid_raw raw
= {
316 EDID_RAW_DEFAULT_PARAMS
,
319 | EDID_INTERFACE_HDMI_A
320 | EDID_COLOR_BIT_DEPTH_8B
,
321 .horizontal_size
= 16, /* Aspect ratio 16:9 in landscape. */
322 .vertical_size
= 0, /* Landscape flag */
323 .display_gamma
= 120, /* 220% */
324 .supported_features
=
326 | EDID_SUSPEND_MODE(0)
328 | EDID_COLOR_FORMAT_RGB444_YCRCB422_YCRCB422
329 | EDID_SRGB_SUPPORTED(1)
330 | EDID_PREFERRED_TIMING_EXTENDED_INFO
331 | EDID_DISPLAY_FREQUENCY_NON_CONTINUOUS
,
333 .established_supported_timings
= {
334 [0] = EDID_ESTABLISHED_TIMINGS_1_640x480_60Hz
,
337 .manufacturers_reserved_timing
= 0,
338 .standard_timings_supported
= {
341 .descriptor_block_1
= {
342 [0] = EDID_PIXEL_CLOCK(148500000u) & 0xFF,
343 [1] = (EDID_PIXEL_CLOCK(148500000u) >> 8) & 0xFF,
345 /* Horizontal Addressable Video is 1920px,
346 Horizontal Blanking is 280px. */
351 /* Vertical Addressable Video is 1080 lines,
352 Vertical Blanking is 45 lines. */
357 [8] = 88u, /* Horizontal Front Porch in pixels. */
358 [9] = 44u, /* Horizontal Pulse Sync Width in pixels. */
359 [10] = 4u, /* Vertical Front Porch is 4 lines. */
360 [11] = 5u, /* Vertical Sync Pulse Width is 5 lines. */
362 /* Horizontal Addressable Image Size is 1039mm,
363 Vertical Addressable Image Size is 584mm. */
368 [15] = 0x00, /* Horizontal Border Size is 0px. */
369 [16] = 0x00, /* Vertical Border Size is 0px. */
371 /* Timing is Non-Interlaced Video,
372 Stereo Video is not supported,
373 Digital separate and syncs are requires. */
376 .descriptor_block_2
= {
377 [0] = EDID_PIXEL_CLOCK(74250000u) & 0xFF,
378 [1] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF,
380 /* Horizontal Addressable Video is 1920px,
381 Horizontal Blanking is 280px. */
386 /* Vertical Addressable Video is 540 lines,
387 Vertical Blanking is 22 lines. */
392 [8] = 88u, /* Horizontal Front Porch in pixels. */
393 [9] = 44u, /* Horizontal Pulse Sync Width in pixels. */
394 [10] = 0x25, /* Vertical Front Porch is 2 lines. */
395 [11] = 0x00, /* Vertical Sync Pulse Width is 5 lines. */
397 /* Horizontal Addressable Image Size is 1039mm,
398 Vertical Addressable Image Size is 584mm. */
403 [15] = 0x00, /* Horizontal Border Size is 0px. */
404 [16] = 0x00, /* Vertical Border Size is 0px. */
406 /* Timing is Interlaced Video,
407 Stereo Video is not supported,
408 Digital separate and syncs are requires. */
411 .descriptor_block_3
= {
412 [0] = EDID_PIXEL_CLOCK(74250000u) & 0xFF,
413 [1] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF,
415 /* Horizontal Addressable Video is 1280px,
416 Horizontal Blanking is 370px. */
421 /* Vertical Addressable Video is 720 lines,
422 Vertical Blanking is 30 lines. */
427 [8] = 110u, /* Horizontal Front Porch in pixels. */
428 [9] = 40u, /* Horizontal Pulse Sync Width in pixels. */
429 [10] = 0x55u
, /* Vertical Front Porch is 5 lines. */
430 [11] = 0x00, /* Vertical Sync Pulse Width is 5 lines. */
432 /* Horizontal Addressable Image Size is 1039mm,
433 Vertical Addressable Image Size is 584mm. */
438 [15] = 0x00, /* Horizontal Border Size is 0px. */
439 [16] = 0x00, /* Vertical Border Size is 0px. */
441 /* Timing is Non-Interlaced Video,
442 Stereo Video is not supported,
443 Digital separate syncs are requires. */
446 .descriptor_block_4
= {
447 /* Display Product Name Block Tag */
469 .extension_flag
= 0x0, /* No extensions */
472 edid_raw_calc_checksum(&raw
);
474 unsigned char ext
[128] = {
475 [0] = 0x02, /* CEA 861 Extension Block Tag Code */
476 [1] = 0x03, /* CEA 861 Block Version */
478 [2] = 0x18, /* Detail Timing Descriptors start 0x18 bytes from here. */
480 /* Underscan is not supported,
481 Basic Audio is supported,
482 YCbCr 4:4:4 & YCbCr 4:2:2 are supported,
483 Number of native formats: 2. */
486 /* Video Data Block Tag Code is 2,
487 Number of Short Video Descriptor Bytes is 7. */
490 /* 1920x1080p 59.94/60 Hz 16 : 9 AR (CEA Format #16)
491 is a supported Native Format. */
494 /* 1920x1080i 59.94/60 Hz 16 : 9 AR (CEA Format #5)
495 is a supported Native Format. */
498 /* 1280x720p 59.94/60 Hz 16 : 9 AR (CEA Format #4) is a supported format. */
501 /* 720x480p 59.94/60 Hz 16 : 9 AR (CEA Format #3) is a supported format. */
504 /* 720x480p 59.94/60 Hz 4 : 3 AR (CEA Format #2) is a supported format. */
507 /* 720x480i 59.94/60 Hz 16 : 9 AR (CEA Format #7) is a supported format. */
510 /* 720x480i 59.94/60 Hz 4 : 3 AR (CEA Format #6) is a supported format. */
513 /* Audio Data Block Tag Code is 1,
514 Number of Short Audio Descriptor Bytes is 3. */
517 /* Audio Format Tag Code is 1 --- LPCM is supported,
518 Maximum number of audio channels is 2. */
521 /* Supported Sampling Frequencies include: 48kHz; 44.1kHz & 32kHz. */
524 /* Supported Sampling Bit Rates include: 24 bit; 20 bit & 16 bit. */
527 /* Speaker Allocation Block Tag Code is 4,
528 Number of Speaker Allocation Descriptor Bytes is 3. */
531 /* Speaker Allocation is Front-Left & Front-Right. */
537 /* Vendor Specific Data Block Tag Code is 3,
538 Number of Vendor Specific Data Bytes is 5. */
541 /* 24bit IEEE registration Identifier is 0x000C03. */
546 /* Vendor Specific Data is 0x10000. */
550 /* Descriptor Block 5 [18 Bytes] */
552 [26] = EDID_PIXEL_CLOCK(27027000u) & 0xFF,
553 [27] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF,
555 /* Horizontal Addressable Video is 720px,
556 Horizontal Blanking is 138 px. */
561 /* Vertical Addressable Video is 480 lines,
562 Vertical Blanking is 45 lines. */
567 [34] = 16u, /* Horizontal Front Porch in pixels. */
568 [35] = 62u, /* Horizontal Sync Pulse Width in pixels. */
569 [36] = 0x96, /* Vertical Front Porch is 9 lines. */
570 [37] = 0x00, /* Vertical Sync Pulse Width is 6 lines. */
572 /* Displayed Image Aspect Ratio is 16:9 */
577 /* Horizontal and Vertical Border Size is 0 px */
581 /* Timing is Interlaced Video,
582 Stereo Video is not supported,
583 Digital Separate Syncs are required. */
586 /* Descriptor Block 6 [18 Bytes] */
588 [44] = EDID_PIXEL_CLOCK(27027000u) & 0xFF,
589 [45] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF,
591 /* Horizontal Addressable Video is 720px,
592 Horizontal Blanking is 138 px. */
597 /* Vertical Addressable Video is 480 lines,
598 Vertical Blanking is 45 lines. */
603 [52] = 16u, /* Horizontal Front Porch in pixels. */
604 [53] = 62u, /* Horizontal Sync Pulse Width in pixels. */
605 [54] = 0x96, /* Vertical Front Porch is 9 lines. */
606 [55] = 0x00, /* Vertical Sync Pulse Width is 6 lines. */
608 /* Displayed Image Aspect Ratio is 4:3. */
613 /* Horizontal and Vertical Border Size is 0px. */
617 /* Timing is Interlaced Video,
618 Stereo Video is not supported,
619 Digital Separate Syncs are required. */
622 /* Descriptor Block 7 [18 Bytes] */
624 [62] = EDID_PIXEL_CLOCK(27027000u) & 0xFF,
625 [63] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF,
627 /* Horizontal Addressable Video is 1440px,
628 Horizontal Blanking is 276 px. */
633 /* Vertical Addressable Video is 240 lines,
634 Vertical Blanking is 23 lines. */
639 [70] = 38u, /* Horizontal Front Porch in pixels. */
640 [71] = 124u, /* Horizontal Sync Pulse Width in pixels. */
641 [72] = 0x43, /* Vertical Front Porch is 9 lines. */
642 [73] = 0x00, /* Vertical Sync Pulse Width is 6 lines. */
644 /* Displayed Image Aspect Ratio is 16:9 */
649 /* Horizontal and Vertical Border Size is 0px. */
653 /* Timing is Interlaced Video,
654 Stereo Video is not supported,
655 Digital Separate Syncs are required. */
658 /* Descriptor Block 8 [18 Bytes] */
660 [80] = EDID_PIXEL_CLOCK(27027000u) & 0xFF,
661 [81] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF,
663 /* Horizontal Addressable Video is 1440px,
664 Horizontal Blanking is 276 px. */
669 /* Vertical Addressable Video is 240 lines,
670 Vertical Blanking is 23 lines. */
675 [88] = 38u, /* Horizontal Front Porch in pixels. */
676 [89] = 124u, /* Horizontal Sync Pulse Width in pixels. */
677 [90] = 0x43, /* Vertical Front Porch is 9 lines. */
678 [91] = 0x00, /* Vertical Sync Pulse Width is 6 lines. */
680 /* Displayed Image Aspect Ratio is 4:3. */
685 /* Horizontal and Vertical Border Size is 0px. */
689 /* Timing is Interlaced Video,
690 Stereo Video is not supported,
691 Digital Separate Syncs are required. */
696 ext
[127] = get_raw_edid_checksum(ext
);
698 *state
= malloc(sizeof(struct test_state
));
700 struct test_state ts
= {.data_size
= sizeof(raw
) + sizeof(ext
),
701 .data
= malloc(sizeof(raw
) + sizeof(ext
))};
703 memcpy(ts
.data
, &raw
, sizeof(raw
));
704 memcpy(ts
.data
+ sizeof(raw
), &ext
[0], sizeof(ext
));
706 memcpy(*state
, &ts
, sizeof(ts
));
711 /* Test decoding of EDID frame with one extension. */
712 static void test_decode_edid_dtv_frame_with_extension(void **state
)
715 struct test_state
*ts
= *state
;
717 /* In real-life situations frames often are not 100% conformant,
718 but are at least correct when it comes to key data fields. */
719 assert_int_equal(EDID_CONFORMANT
,
720 decode_edid((unsigned char *)ts
->data
, ts
->data_size
, &out
));
722 assert_int_equal(32, out
.framebuffer_bits_per_pixel
);
723 assert_int_equal(8, out
.panel_bits_per_color
);
724 assert_int_equal(24, out
.panel_bits_per_pixel
);
725 assert_int_equal(0, out
.link_clock
);
726 assert_int_equal(1920, out
.x_resolution
);
727 assert_int_equal(1080, out
.y_resolution
);
728 assert_int_equal(7680, out
.bytes_per_line
);
729 assert_int_equal(1, out
.hdmi_monitor_detected
);
730 assert_int_equal(0, strnlen(out
.ascii_string
, ARRAY_SIZE(out
.ascii_string
)));
731 assert_string_equal(out
.manufacturer_name
, EDID_MANUFACTURER_NAME
);
734 assert_null(out
.mode
.name
);
735 assert_int_equal(148500, out
.mode
.pixel_clock
);
736 assert_int_equal(1, out
.mode
.lvds_dual_channel
);
737 assert_int_equal(0, out
.mode
.refresh
);
738 assert_int_equal(1920, out
.mode
.ha
);
739 assert_int_equal(280, out
.mode
.hbl
);
740 assert_int_equal(88, out
.mode
.hso
);
741 assert_int_equal(44, out
.mode
.hspw
);
742 assert_int_equal(0, out
.mode
.hborder
);
743 assert_int_equal(1080, out
.mode
.va
);
744 assert_int_equal(45, out
.mode
.vbl
);
745 assert_int_equal(16, out
.mode
.vso
);
746 assert_int_equal(0, out
.mode
.vborder
);
747 assert_int_equal(43, out
.mode
.phsync
);
748 assert_int_equal(43, out
.mode
.pvsync
);
749 assert_int_equal(0, out
.mode
.x_mm
);
750 assert_int_equal(0, out
.mode
.y_mm
);
752 assert_int_equal(1, out
.mode_is_supported
[EDID_MODE_640x480_60Hz
]);
753 assert_int_equal(0, out
.mode_is_supported
[EDID_MODE_720x480_60Hz
]);
754 assert_int_equal(0, out
.mode_is_supported
[EDID_MODE_1280x720_60Hz
]);
755 assert_int_equal(0, out
.mode_is_supported
[EDID_MODE_1920x1080_60Hz
]);
759 /* Test decoding of EDID frame with one extension. Tested frame is modified
760 example of base EDID frame with CEA861 extension for IT/DTV Display from
761 VESA E-EDID Standard Release A2. */
762 static int setup_decode_edid_it_dtv_frame_with_extension(void **state
)
764 struct edid_raw raw
= {
765 EDID_RAW_DEFAULT_PARAMS
,
768 | EDID_INTERFACE_HDMI_A
769 | EDID_COLOR_BIT_DEPTH_8B
,
770 .horizontal_size
= 121, /* Aspect ratio 16:9 in landscape */
771 .vertical_size
= 68, /* Landscape flag */
772 .display_gamma
= 120, /* 220% */
773 .supported_features
=
775 | EDID_SUSPEND_MODE(0)
777 | EDID_COLOR_FORMAT_RGB444_YCRCB422_YCRCB422
778 | EDID_SRGB_SUPPORTED(1)
779 | EDID_PREFERRED_TIMING_EXTENDED_INFO
780 | EDID_DISPLAY_FREQUENCY_NON_CONTINUOUS
,
781 .established_supported_timings
= {
782 [0] = EDID_ESTABLISHED_TIMINGS_1_800x600_60Hz
783 | EDID_ESTABLISHED_TIMINGS_1_800x600_56Hz
784 | EDID_ESTABLISHED_TIMINGS_1_640x480_75Hz
785 | EDID_ESTABLISHED_TIMINGS_1_640x480_72Hz
786 | EDID_ESTABLISHED_TIMINGS_1_640x480_67Hz
787 | EDID_ESTABLISHED_TIMINGS_1_640x480_60Hz
788 | EDID_ESTABLISHED_TIMINGS_1_720x400_88Hz
789 | EDID_ESTABLISHED_TIMINGS_1_720x400_70Hz
,
790 [1] = EDID_ESTABLISHED_TIMINGS_2_1280x1024_75Hz
791 | EDID_ESTABLISHED_TIMINGS_2_1024x768_75Hz
792 | EDID_ESTABLISHED_TIMINGS_2_1024x768_70Hz
793 | EDID_ESTABLISHED_TIMINGS_2_1024x768_60Hz
794 | EDID_ESTABLISHED_TIMINGS_2_832x624_75Hz
795 | EDID_ESTABLISHED_TIMINGS_2_800x600_75Hz
796 | EDID_ESTABLISHED_TIMINGS_2_800x600_72Hz
,
798 .manufacturers_reserved_timing
= EDID_MANUFACTURERS_TIMINGS_1152x870_75Hz
,
799 .standard_timings_supported
= {
800 [0] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280),
801 [1] = EDID_ASPECT_RATIO_5_4
| EDID_FIELD_REFRESH_RATE(85),
803 [2] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280),
804 [3] = EDID_ASPECT_RATIO_5_4
| EDID_FIELD_REFRESH_RATE(60),
806 [4] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280),
807 [5] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(85),
809 [6] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280),
810 [7] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(60),
812 [8] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1024),
813 [9] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(85),
815 [10] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(848),
816 [11] = EDID_ASPECT_RATIO_16_9
| EDID_FIELD_REFRESH_RATE(60),
818 [12] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(800),
819 [13] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(60),
821 [14] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(640),
822 [15] = EDID_ASPECT_RATIO_4_3
| EDID_FIELD_REFRESH_RATE(60),
824 .descriptor_block_1
= {
825 [0] = EDID_PIXEL_CLOCK(85500000u) & 0xFF,
826 [1] = (EDID_PIXEL_CLOCK(85500000u) >> 8) & 0xFF,
828 /* Horizontal Addressable Video is 1360px,
829 Horizontal Blanking is 432px. */
834 /* Vertical Addressable Video is 768 lines,
835 Vertical Blanking is 27 lines. */
840 [8] = 64u, /* Horizontal Front Porch in pixels. */
841 [9] = 112u, /* Horizontal Pulse Sync Width in pixels. */
842 [10] = 0x36, /* Vertical Front Porch is 3 lines. */
843 [11] = 0u, /* Vertical Sync Pulse Width is 6 lines. */
845 /* Horizontal Addressable Image Size is 1214mm,
846 Vertical Addressable Image Size is 683mm. */
851 [15] = 0x00, /* Horizontal border size is 0px. */
852 [16] = 0x00, /* Vertical Border Size is 0px. */
854 /* Timing is Non-Interlaced Video,
855 Stereo Video is not supported,
856 Digital separate and syncs are requires. */
859 .descriptor_block_2
= {
860 [0] = EDID_PIXEL_CLOCK(74250000u) & 0xFF,
861 [1] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF,
863 /* Horizontal Addressable Video is 1280px,
864 Horizontal Blanking is 370px. */
869 /* Vertical Addressable Video is 720 lines,
870 Vertical Blanking is 30 lines. */
875 [8] = 110u, /* Horizontal Front Porch in pixels. */
876 [9] = 40u, /* Horizontal Pulse Sync Width in pixels. */
877 [10] = 0x55, /* Vertical Front Porch is 5 lines. */
878 [11] = 0x00, /* Vertical Sync Pulse Width is 5 lines. */
880 /* Horizontal Addressable Image Size is 1214mm,
881 Vertical Addressable Image Size is 683mm. */
886 [15] = 0x00, /* Horizontal border size is 0px. */
887 [16] = 0x00, /* Vertical Border Size is 0px. */
889 /* Timing is Non-Interlaced Video,
890 Stereo Video is not supported,
891 Digital separate and syncs are required. */
894 .descriptor_block_3
= {
895 /* Established timings III Block Tag */
900 /* VESA DMT Standard Version #10 */
910 * 1152x864@75Hz are supported.
923 * 1400x1050@60Hz (Normal Blanking),
924 * 1400x1050@75Hz are supported.
932 * 1600x1200@70Hz are supported.
938 * 1600x1200@85Hz are supported.
942 /* 1920 PC Timings are not supported. */
948 .descriptor_block_4
= {
949 /* Display Product Name Block Tag */
971 .extension_flag
= 0x0, /* No extensions */
974 edid_raw_calc_checksum(&raw
);
976 unsigned char ext
[128] = {
977 [0] = 0x02, /* CEA 861 Extension Block Tag Code */
978 [1] = 0x03, /* CEA 861 Block Version */
979 [2] = 0x17, /* Detail Timing Descriptors start 0x17 bytesfrom here */
981 /* Underscan is supported,
982 Basic Audio is supported,
983 YCbCr 4:4:4 & YCbCr 4:2:2 are supported,
984 Number of native formats: 0. */
987 /* Video Data Block Tag Code is 2.
988 Number of Short Video Descriptor Bytes is 6. */
991 /* 1920x1080i 59.94/60 Hz 16 : 9 AR (CEA Format #5) is a supported format. */
994 /* 1280x720p 59.94/60 Hz 16 : 9 AR (CEA Format #4) is a supported format. */
997 /* 720x480p 59.94/60 Hz 16 : 9 AR (CEA Format #3) is a supported format. */
1000 /* 720x480p 59.94/60 Hz 4 : 3 AR (CEA Format #2) is a supported format. */
1003 /* 720x480i 59.94/60 Hz 16 : 9 AR (CEA Format #7) is a supported format. */
1006 /* 720x480i 59.94/60 Hz 4 : 3 AR (CEA Format #6) is a supported format. */
1009 /* Audio Data Block Tag Code is 1,
1010 Number of Short Audio Descriptor Bytes is 3. */
1013 /* Audio Format Tag Code is 1 --- LPCM is supported,
1014 Maximum number of audio channels is 2. */
1017 /* Supported Sampling Frequencies include: 48kHz; 44.1kHz & 32kHz. */
1020 /* Supported Sampling Bit Rates include: 24 bit; 20 bit & 16 bit. */
1023 /* Speaker Allocation Block Tag Code is 4,
1024 Number of Speaker Allocation Descriptor Bytes is 3. */
1027 /* Speaker Allocation is Front-Left & Front-Right */
1033 /* Vendor Specific Data Block Tag Code is 3,
1034 Number of Vendor Specific Data Bytes is 5. */
1037 /* 24bit IEEE registration Identifier is 0x000C03. */
1042 /* Vendor Specific Data is 0x10000. */
1046 /* Descriptor Block 5 [18 Bytes] */
1048 [25] = EDID_PIXEL_CLOCK(74250000u) & 0xFF,
1049 [26] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF,
1051 /* Horizontal Addressable Video is 1920px,
1052 Horizontal Blanking is 280px. */
1057 /* Vertical Addressable Video is 540 lines,
1058 Vertical Blanking is 22 lines. */
1063 [33] = 88u, /* Horizontal Front Porch in pixels. */
1064 [34] = 44u, /* Horizontal Sync Pulse Width in pixels. */
1065 [35] = 0x25, /* Vertical Front Porch is 2 lines. */
1066 [36] = 0x00, /* Vertical Sync Pulse Width is 5 lines. */
1068 /* Image size: 1039mm x 584mm */
1073 /* Horizontal and Vertical Border Size is 0px. */
1077 /* Timing is Interlaced Video,
1078 Stereo Video is not supported,
1079 Digital Separate Syncs are required. */
1082 /* Descriptor Block 6 [18 Bytes] */
1084 [43] = EDID_PIXEL_CLOCK(74250000u) & 0xFF,
1085 [44] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF,
1087 /* Horizontal Addressable Video is 1280px,
1088 Horizontal Blanking is 370 px. */
1093 /* Vertical Addressable Video is 720 lines,
1094 Vertical Blanking is 30 lines. */
1099 [51] = 110u, /* Horizontal Front Porch in pixels. */
1100 [52] = 40u, /* Horizontal Sync Pulse Width in pixels. */
1101 [53] = 0x55, /* Vertical Front Porch is 5 lines. */
1102 [54] = 0x00, /* Vertical Sync Pulse Width is 5 lines. */
1104 /* Image size: 1039mm x 584mm */
1109 /* Horizontal and Vertical Border Size is 0px. */
1113 /* Timing is Non-Interlaced Video,
1114 Stereo Video is not supported,
1115 Digital Separate Syncs are required. */
1118 /* Descriptor Block 7 [18 Bytes] */
1120 [61] = EDID_PIXEL_CLOCK(27000000u) & 0xFF,
1121 [62] = (EDID_PIXEL_CLOCK(27000000u) >> 8) & 0xFF,
1123 /* Horizontal Addressable Video is 1440px,
1124 Horizontal Blanking is 276 px. */
1129 /* Vertical Addressable Video is 240 lines,
1130 Vertical Blanking is 23 lines. */
1135 [69] = 38u, /* Horizontal Front Porch in pixels. */
1136 [70] = 124u, /* Horizontal Sync Pulse Width in pixels. */
1137 [71] = 0x43, /* Vertical Front Porch is 4 lines. */
1138 [72] = 0x00, /* Vertical Sync Pulse Width is 3 lines. */
1140 /* Image size: 1039mm x 584mm */
1145 /* Horizontal and Vertical Border Size is 0px. */
1149 /* Timing is Interlaced Video,
1150 Stereo Video is not supported,
1151 Digital Separate Syncs are required. */
1154 /* Descriptor Block 8 [18 Bytes] */
1156 [79] = EDID_PIXEL_CLOCK(27027000u) & 0xFF,
1157 [80] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF,
1159 /* Horizontal Addressable Video is 1440px,
1160 Horizontal Blanking is 276 px. */
1165 /* Vertical Addressable Video is 240 lines,
1166 Vertical Blanking is 23 lines. */
1171 [87] = 38u, /* Horizontal Front Porch in pixels. */
1172 [88] = 124u, /* Horizontal Sync Pulse Width in pixels. */
1173 [89] = 0x43, /* Vertical Front Porch is 4 lines. */
1174 [90] = 0x00, /* Vertical Sync Pulse Width is 3 lines. */
1176 /* Image size: 1039mm x 584mm */
1181 /* Horizontal and Vertical Border Size is 0px. */
1185 /* Timing is Interlaced Video,
1186 Stereo Video is not supported,
1187 Digital Separate Syncs are required. */
1193 ext
[127] = get_raw_edid_checksum(ext
);
1195 *state
= malloc(sizeof(struct test_state
));
1197 struct test_state ts
= {.data_size
= sizeof(raw
) + sizeof(ext
),
1198 .data
= malloc(sizeof(raw
) + sizeof(ext
))};
1200 memcpy(ts
.data
, &raw
, sizeof(raw
));
1201 memcpy(ts
.data
+ sizeof(raw
), &ext
[0], sizeof(ext
));
1203 memcpy(*state
, &ts
, sizeof(ts
));
1208 static void test_decode_edid_it_dtv_frame_with_extension(void **state
)
1211 struct test_state
*ts
= *state
;
1213 /* In real-life situations frames often are not 100% conformant,
1214 but are at least correct when it comes to key data fields. */
1215 assert_int_equal(EDID_CONFORMANT
,
1216 decode_edid((unsigned char *)ts
->data
, ts
->data_size
, &out
));
1218 assert_int_equal(32, out
.framebuffer_bits_per_pixel
);
1219 assert_int_equal(8, out
.panel_bits_per_color
);
1220 assert_int_equal(24, out
.panel_bits_per_pixel
);
1221 assert_int_equal(0, out
.link_clock
);
1222 assert_int_equal(1360, out
.x_resolution
);
1223 assert_int_equal(768, out
.y_resolution
);
1224 assert_int_equal(5440, out
.bytes_per_line
);
1225 assert_int_equal(1, out
.hdmi_monitor_detected
);
1226 assert_int_equal(0, strnlen(out
.ascii_string
, ARRAY_SIZE(out
.ascii_string
)));
1227 assert_string_equal(out
.manufacturer_name
, EDID_MANUFACTURER_NAME
);
1230 assert_null(out
.mode
.name
);
1231 assert_int_equal(85500, out
.mode
.pixel_clock
);
1232 assert_int_equal(0, out
.mode
.lvds_dual_channel
);
1233 assert_int_equal(0, out
.mode
.refresh
);
1234 assert_int_equal(1360, out
.mode
.ha
);
1235 assert_int_equal(432, out
.mode
.hbl
);
1236 assert_int_equal(64, out
.mode
.hso
);
1237 assert_int_equal(112, out
.mode
.hspw
);
1238 assert_int_equal(0, out
.mode
.hborder
);
1239 assert_int_equal(768, out
.mode
.va
);
1240 assert_int_equal(27, out
.mode
.vbl
);
1241 assert_int_equal(3, out
.mode
.vso
);
1242 assert_int_equal(0, out
.mode
.vborder
);
1243 assert_int_equal(43, out
.mode
.phsync
);
1244 assert_int_equal(43, out
.mode
.pvsync
);
1245 assert_int_equal(0, out
.mode
.x_mm
);
1246 assert_int_equal(0, out
.mode
.y_mm
);
1248 assert_int_equal(1, out
.mode_is_supported
[EDID_MODE_640x480_60Hz
]);
1249 assert_int_equal(0, out
.mode_is_supported
[EDID_MODE_720x480_60Hz
]);
1250 assert_int_equal(0, out
.mode_is_supported
[EDID_MODE_1280x720_60Hz
]);
1251 assert_int_equal(0, out
.mode_is_supported
[EDID_MODE_1920x1080_60Hz
]);
1254 static int teardown_edid_test(void **state
)
1256 struct test_state
*ts
;
1261 ts
= (struct test_state
*)*state
;
1269 static void test_edid_set_framebuffer_bits_per_pixel(void **state
)
1272 struct test_state
*ts
= *state
;
1274 decode_edid((unsigned char *)ts
->data
, ts
->data_size
, &out
);
1276 edid_set_framebuffer_bits_per_pixel(&out
, 16, 2);
1278 assert_int_equal(16, out
.framebuffer_bits_per_pixel
);
1279 assert_int_equal(out
.mode
.ha
* 2, out
.bytes_per_line
);
1280 assert_int_equal(out
.bytes_per_line
/ (16 / 8), out
.x_resolution
);
1281 assert_int_equal(out
.mode
.va
, out
.y_resolution
);
1283 edid_set_framebuffer_bits_per_pixel(&out
, 24, 4);
1285 assert_int_equal(24, out
.framebuffer_bits_per_pixel
);
1286 assert_int_equal(out
.mode
.ha
* 3, out
.bytes_per_line
);
1287 assert_int_equal(out
.bytes_per_line
/ (24 / 8), out
.x_resolution
);
1288 assert_int_equal(out
.mode
.va
, out
.y_resolution
);
1290 edid_set_framebuffer_bits_per_pixel(&out
, 32, 4);
1292 assert_int_equal(32, out
.framebuffer_bits_per_pixel
);
1293 assert_int_equal(out
.mode
.ha
* 4, out
.bytes_per_line
);
1294 assert_int_equal(out
.bytes_per_line
/ (32 / 8), out
.x_resolution
);
1295 assert_int_equal(out
.mode
.va
, out
.y_resolution
);
1300 const struct CMUnitTest tests
[] = {
1301 cmocka_unit_test(test_decode_edid_no_edid
),
1302 cmocka_unit_test(test_decode_edid_invalid_header
),
1303 cmocka_unit_test_setup_teardown(test_decode_edid_basic_frame
,
1304 setup_decode_edid_basic_frame
,
1305 teardown_edid_test
),
1306 cmocka_unit_test_setup_teardown(test_decode_edid_dtv_frame_with_extension
,
1307 setup_decode_edid_dtv_frame_with_extension
,
1308 teardown_edid_test
),
1309 cmocka_unit_test_setup_teardown(test_decode_edid_it_dtv_frame_with_extension
,
1310 setup_decode_edid_it_dtv_frame_with_extension
,
1311 teardown_edid_test
),
1312 cmocka_unit_test_setup_teardown(test_edid_set_framebuffer_bits_per_pixel
,
1313 setup_decode_edid_basic_frame
,
1314 teardown_edid_test
),
1317 return cb_run_group_tests(tests
, NULL
, NULL
);