1 # Adding new devices to a device tree
5 ACPI exposes a platform-independent interface for operating systems to perform
6 power management and other platform-level functions. Some operating systems
7 also use ACPI to enumerate devices that are not immediately discoverable, such
8 as those behind I2C or SPI buses (in contrast to PCI). This document discusses
9 the way that coreboot uses the concept of a "device tree" to generate ACPI
10 tables for usage by the operating system.
12 ## Devicetree and overridetree (if applicable)
14 For mainboards that are organized around a "reference board" or "baseboard"
15 model (see ``src/mainboard/google/octopus`` or ``hatch`` for examples), there is
16 typically a devicetree.cb file that all boards share, and any differences for a
17 specific board ("variant") are captured in the overridetree.cb file. Any
18 settings changed in the overridetree take precedence over those in the main
19 devicetree. Note, not all mainboards will have the devicetree/overridetree
20 distinction, and may only have a devicetree.cb file. Or you can always just
21 write the ASL (ACPI Source Language) code yourself.
23 ### Naming and referencing devices
25 When declaring a device, it can optionally be given an alias that can be
26 referred to elsewhere. This is particularly useful to declare a device in one
27 device tree while allowing its configuration to be more easily changed in an
28 overlay. For instance, the AMD Picasso SoC definition
29 (`soc/amd/picasso/chipset.cb`) declares an IOMMU on a PCI bus that is disabled
36 device pci 00.2 alias iommu off end
42 A device based on this SoC can override the configuration for the IOMMU without
43 duplicating addresses, as in
44 `mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb`:
50 device ref iommu on end
56 In this example the override simply enables the IOMMU, but it could also
57 set additional properties (or even add child devices) inside the IOMMU `device`
62 It is important to note that devices that use `device ref` syntax to override
63 previous definitions of a device by alias must be placed at **exactly the same
64 location in the device tree** as the original declaration. If not, this will
65 actually create another device rather than overriding the properties of the
66 existing one. For instance, if the above snippet from `devicetree_trembyle.cb`
67 were written as follows:
71 # NOTE: not inside domain 0!
72 device ref iommu on end
76 Then this would leave the SoC's IOMMU disabled, and instead create a new device
77 with no properties as a direct child of the SoC.
81 Let's take a look at an example entry from
82 ``src/mainboard/google/hatch/variants/hatch/overridetree.cb``:
86 chip drivers/i2c/generic
87 register "hid" = ""ELAN0000""
88 register "desc" = ""ELAN Touchpad""
89 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A21_IRQ)"
90 register "wake" = "GPE0_DW0_21"
96 When this entry is processed during ramstage, it will create a device in the
97 ACPI SSDT table (all devices in devicetrees end up in the SSDT table). The ACPI
98 generation routines in coreboot actually generate the raw bytecode that
99 represents the device's structure, but looking at ASL code is easier to
100 understand; see below for what the disassembled bytecode looks like:
103 Scope (\_SB.PCI0.I2C0)
107 Name (_HID, "ELAN0000") // _HID: Hardware ID
108 Name (_UID, Zero) // _UID: Unique ID
109 Name (_DDN, "ELAN Touchpad") // _DDN: DOS Device Name
110 Method (_STA, 0, NotSerialized) // _STA: Status
114 Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
116 I2cSerialBusV2 (0x0015, ControllerInitiated, 400000,
117 AddressingMode7Bit, "\\_SB.PCI0.I2C0",
118 0x00, ResourceConsumer, , Exclusive, )
119 Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, )
124 Name (_S0W, ACPI_DEVICE_SLEEP_D3_HOT) // _S0W: S0 Device Wake State
125 Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
128 0x03 // Sleep state S3
134 You can see it generates _HID, _UID, _DDN, _STA, _CRS, _S0W, and _PRW
135 names/methods in the Device's scope.
137 ## Utilizing a device driver
139 The device driver must be enabled for your build. There will be a CONFIG option
140 in the Kconfig file in the directory that the driver is in (e.g.,
141 ``src/drivers/i2c/generic`` contains a Kconfig file; the option here is named
142 CONFIG_DRIVERS_I2C_GENERIC). The config option will need to be added to your
143 mainboard's Kconfig file (e.g., ``src/mainboard/google/hatch/Kconfig``) in order
144 to be compiled into your build.
146 ## Diving into the above example:
148 Let's take a look at how the devicetree language corresponds to the generated
154 chip drivers/i2c/generic
157 This means that the device driver we're using has a corresponding structure,
158 located at ``src/drivers/i2c/generic/chip.h``, named **struct
159 drivers_i2c_generic_config** and it contains many properties you can specify to
160 be included in the ACPI table.
165 register "hid" = ""ELAN0000""
168 This corresponds to **const char *hid** in the struct. In the ACPI ASL, it
172 Name (_HID, "ELAN0000") // _HID: Hardware ID
175 under the device. **This property is used to match the device to its driver
176 during enumeration in the OS.**
181 register "desc" = ""ELAN Touchpad""
184 corresponds to **const char *desc** and in ASL:
187 Name (_DDN, "ELAN Touchpad") // _DDN: DOS Device Name
192 It also adds the interrupt,
195 Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, )
204 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A21_IRQ)"
207 The GPIO pin IRQ settings control the "Level", "ActiveLow", and
208 "ExclusiveAndWake" settings seen above (level means it is a level-triggered
209 interrupt as opposed to edge-triggered; active low means the interrupt is
210 triggered when the signal is low).
212 Note that the ACPI_IRQ_WAKE_LEVEL_LOW macro informs the platform that the GPIO
213 will be routed through SCI (ACPI's System Control Interrupt) for use as a wake
214 source. Also note that the IRQ names are SoC-specific, and you will need to
215 find the names in your SoC's header file. The ACPI_* macros are defined in
216 ``src/arch/x86/include/acpi/acpi_device.h``.
218 Using a GPIO as an IRQ requires that it is configured in coreboot correctly.
219 This is often done in a mainboard-specific file named ``gpio.c``.
223 The last register is:
226 register "wake" = "GPE0_DW0_21"
229 which indicates that the method of waking the system using the touchpad will be
230 through a GPE, #21 associated with DW0, which is set up in devicetree.cb from
231 this example. The "21" indicates GPP_X21, where GPP_X is mapped onto DW0
232 elsewhere in the devicetree.
234 The last bit of the definition of that device includes:
240 which means it's an I2C device, with 7-bit address 0x15, and the device is "on",
241 meaning it will be exposed in the ACPI table. The PCI device that the
242 controller is located in determines which I2C bus the device is expected to be
243 found on. In this example, this is I2C bus 0. This also determines the ACPI
244 "Scope" that the device names and methods will live under, in this case
247 ## Other auto-generated names
249 (see [ACPI specification
250 6.3](https://uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf)
251 for more details on ACPI methods)
253 ### _S0W (S0 Device Wake State)
254 _S0W indicates the deepest S0 sleep state this device can wake itself from,
255 which in this case is ACPI_DEVICE_SLEEP_D3_HOT, representing _D3hot_.
257 ### _PRW (Power Resources for Wake)
258 _PRW indicates the power resources and events required for wake. There are no
259 dependent power resources, but the GPE (GPE0_DW0_21) is mentioned here (0x15),
260 as well as the deepest sleep state supporting waking the system (3), which is
264 The _STA method is generated automatically, and its values, 0xF, indicates the
267 Bit [0] – Set if the device is present.
268 Bit [1] – Set if the device is enabled and decoding its resources.
269 Bit [2] – Set if the device should be shown in the UI.
270 Bit [3] – Set if the device is functioning properly (cleared if device failed its diagnostics).
272 ### _CRS (Current resource settings)
273 The _CRS method is generated automatically, as the driver knows it is an I2C
274 controller, and so specifies how to configure the controller for proper
275 operation with the touchpad.
278 Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
280 I2cSerialBusV2 (0x0015, ControllerInitiated, 400000,
281 AddressingMode7Bit, "\\_SB.PCI0.I2C0",
282 0x00, ResourceConsumer, , Exclusive, )
287 - **All fields that are left unspecified in the devicetree are initialized to
289 - **All devices in devicetrees end up in the SSDT table, and are generated in
290 coreboot's ramstage**