src/include/smbios.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef SMBIOS_H
   4 #define SMBIOS_H
   5
   6 #include <types.h>
   7 #include <memory_info.h>
   8
   9 unsigned long smbios_write_tables(unsigned long start);
  10 int smbios_add_string(u8 *start, const char *str);
  11 int smbios_string_table_len(u8 *start);
  12
  13 struct smbios_header;
  14 int smbios_full_table_len(struct smbios_header *header, u8 *str_table_start);
  15 void *smbios_carve_table(unsigned long start, u8 type, u8 length, u16 handle);
  16
  17 /* Used by mainboard to add an on-board device */
  18 enum misc_slot_type;
  19 enum misc_slot_length;
  20 enum misc_slot_usage;
  21 enum slot_data_bus_bandwidth;
  22 int smbios_write_type9(unsigned long *current, int *handle,
  23                         const char *name, const enum misc_slot_type type,
  24                         const enum slot_data_bus_bandwidth bandwidth,
  25                         const enum misc_slot_usage usage,
  26                         const enum misc_slot_length length,
  27                         const u16 id, u8 slot_char1, u8 slot_char2, u8 bus, u8 dev_func);
  28 enum smbios_bmc_interface_type;
  29 int smbios_write_type38(unsigned long *current, int *handle,
  30                         const enum smbios_bmc_interface_type interface_type,
  31                         const u8 ipmi_rev, const u8 i2c_addr, const u8 nv_addr,
  32                         const u64 base_addr, const u8 base_modifier,
  33                         const u8 irq);
  34 int smbios_write_type41(unsigned long *current, int *handle,
  35                         const char *name, u8 instance, u16 segment,
  36                         u8 bus, u8 device, u8 function, u8 device_type);
  37 enum smbios_temp_location;
  38 enum smbios_temp_status;
  39 int smbios_write_type28(unsigned long *current, int *handle,
  40                         const char *name,
  41                         const enum smbios_temp_location location,
  42                         const enum smbios_temp_status status,
  43                         u16 max_value, u16 min_value,
  44                         u16 resolution, u16 tolerance,
  45                         u16 accuracy,
  46                         u32 oem,
  47                         u16 nominal_value);
  48
  49 int smbios_write_type43(unsigned long *current, int *handle, const u32 vendor_id,
  50                         const u8 major_spec_ver, const u8 minor_spec_ver,
  51                         const u32 fw_ver1, const u32 fw_ver2, const char *description,
  52                         const u64 characteristics, const u32 oem_defined);
  53
  54 struct device;
  55 int get_smbios_data(struct device *dev, int *handle, unsigned long *current);
  56
  57 const char *smbios_system_manufacturer(void);
  58 const char *smbios_system_product_name(void);
  59 const char *smbios_system_serial_number(void);
  60 const char *smbios_system_version(void);
  61 void smbios_system_set_uuid(u8 *uuid);
  62 const char *smbios_system_sku(void);
  63
  64 unsigned int smbios_cpu_get_max_speed_mhz(void);
  65 unsigned int smbios_cpu_get_current_speed_mhz(void);
  66 unsigned int smbios_cpu_get_voltage(void);
  67
  68 const char *smbios_mainboard_manufacturer(void);
  69 const char *smbios_mainboard_product_name(void);
  70 const char *smbios_mainboard_serial_number(void);
  71 const char *smbios_mainboard_version(void);
  72
  73 const char *smbios_mainboard_bios_version(void);
  74 const char *smbios_mainboard_asset_tag(void);
  75 u8 smbios_mainboard_feature_flags(void);
  76 const char *smbios_mainboard_location_in_chassis(void);
  77 const char *smbios_chassis_version(void);
  78 const char *smbios_chassis_serial_number(void);
  79 const char *smbios_processor_serial_number(void);
  80 u8 smbios_chassis_power_cords(void);
  81
  82 /* This string could be filled late in payload. */
  83 void smbios_type0_bios_version(uintptr_t address);
  84
  85 void smbios_ec_revision(uint8_t *ec_major_revision, uint8_t *ec_minor_revision);
  86
  87 unsigned int smbios_processor_external_clock(void);
  88 unsigned int smbios_processor_characteristics(void);
  89 struct cpuid_result;
  90 unsigned int smbios_processor_family(struct cpuid_result res);
  91
  92 unsigned int smbios_cache_error_correction_type(u8 level);
  93 unsigned int smbios_cache_sram_type(void);
  94 unsigned int smbios_cache_conf_operation_mode(u8 level);
  95
  96 /* Used by mainboard to add port information of type 8 */
  97 struct port_information;
  98 int smbios_write_type8(unsigned long *current, int *handle,
  99                         const struct port_information *port,
 100                         size_t num_ports);
 101
 102 #define BIOS_CHARACTERISTICS_PCI_SUPPORTED      (1 << 7)
 103 #define BIOS_CHARACTERISTICS_PC_CARD            (1 << 8)
 104 #define BIOS_CHARACTERISTICS_PNP                (1 << 9)
 105 #define BIOS_CHARACTERISTICS_APM                (1 << 10)
 106 #define BIOS_CHARACTERISTICS_UPGRADEABLE        (1 << 11)
 107 #define BIOS_CHARACTERISTICS_SHADOW             (1 << 12)
 108 #define BIOS_CHARACTERISTICS_BOOT_FROM_CD       (1 << 15)
 109 #define BIOS_CHARACTERISTICS_SELECTABLE_BOOT    (1 << 16)
 110 #define BIOS_CHARACTERISTICS_BIOS_SOCKETED      (1 << 17)
 111
 112 #define BIOS_EXT1_CHARACTERISTICS_ACPI          (1 << 0)
 113 #define BIOS_EXT2_CHARACTERISTICS_TARGET        (1 << 2)
 114
 115 #define BIOS_MEMORY_ECC_SINGLE_BIT_CORRECTING   (1 << 3)
 116 #define BIOS_MEMORY_ECC_DOUBLE_BIT_CORRECTING   (1 << 4)
 117 #define BIOS_MEMORY_ECC_SCRUBBING               (1 << 5)
 118
 119 #define MEMORY_TYPE_DETAIL_OTHER                (1 << 1)
 120 #define MEMORY_TYPE_DETAIL_UNKNOWN              (1 << 2)
 121 #define MEMORY_TYPE_DETAIL_FAST_PAGED           (1 << 3)
 122 #define MEMORY_TYPE_DETAIL_STATIC_COLUMN        (1 << 4)
 123 #define MEMORY_TYPE_DETAIL_PSEUDO_STATIC        (1 << 5)
 124 #define MEMORY_TYPE_DETAIL_RAMBUS               (1 << 6)
 125 #define MEMORY_TYPE_DETAIL_SYNCHRONOUS          (1 << 7)
 126 #define MEMORY_TYPE_DETAIL_CMOS                 (1 << 8)
 127 #define MEMORY_TYPE_DETAIL_EDO                  (1 << 9)
 128 #define MEMORY_TYPE_DETAIL_WINDOW_DRAM          (1 << 10)
 129 #define MEMORY_TYPE_DETAIL_CACHE_DRAM           (1 << 11)
 130 #define MEMORY_TYPE_DETAIL_NON_VOLATILE         (1 << 12)
 131 #define MEMORY_TYPE_DETAIL_REGISTERED           (1 << 13)
 132 #define MEMORY_TYPE_DETAIL_UNBUFFERED           (1 << 14)
 133 #define MEMORY_TYPE_DETAIL_LRDIMM               (1 << 15)
 134
 135 #define MEMORY_TECHNOLOGY_OTHER                 0x01
 136 #define MEMORY_TECHNOLOGY_UNKNOWN               0x02
 137 #define MEMORY_TECHNOLOGY_DRAM                  0x03
 138 #define MEMORY_TECHNOLOGY_NVDIMM_N              0x04
 139 #define MEMORY_TECHNOLOGY_NVDIMM_F              0x05
 140 #define MEMORY_TECHNOLOGY_NVDIMM_P              0x06
 141 #define MEMORY_TECHNOLOGY_INTEL_PERSISTENT      0x07
 142
 143 #define MEMORY_OPERATING_MODE_CAP_OTHER                         (1 << 1)
 144 #define MEMORY_OPERATING_MODE_CAP_UNKNOWN                       (1 << 2)
 145 #define MEMORY_OPERATING_MODE_CAP_VOLATILE                      (1 << 3)
 146 #define MEMORY_OPERATING_MODE_CAP_BYTE_ACCESS_PERSISTENT        (1 << 4)
 147 #define MEMORY_OPERATING_MODE_CAP_BLOCK_ACCESS_PERSISTENT       (1 << 5)
 148
 149 typedef enum {
 150         MEMORY_BUS_WIDTH_8 = 0,
 151         MEMORY_BUS_WIDTH_16 = 1,
 152         MEMORY_BUS_WIDTH_32 = 2,
 153         MEMORY_BUS_WIDTH_64 = 3,
 154         MEMORY_BUS_WIDTH_128 = 4,
 155         MEMORY_BUS_WIDTH_256 = 5,
 156         MEMORY_BUS_WIDTH_512 = 6,
 157         MEMORY_BUS_WIDTH_1024 = 7,
 158         MEMORY_BUS_WIDTH_MAX = 7,
 159 } smbios_memory_bus_width;
 160
 161 typedef enum {
 162         MEMORY_FORMFACTOR_OTHER = 0x01,
 163         MEMORY_FORMFACTOR_UNKNOWN = 0x02,
 164         MEMORY_FORMFACTOR_SIMM = 0x03,
 165         MEMORY_FORMFACTOR_SIP = 0x04,
 166         MEMORY_FORMFACTOR_CHIP = 0x05,
 167         MEMORY_FORMFACTOR_DIP = 0x06,
 168         MEMORY_FORMFACTOR_ZIP = 0x07,
 169         MEMORY_FORMFACTOR_PROPRIETARY_CARD = 0x08,
 170         MEMORY_FORMFACTOR_DIMM = 0x09,
 171         MEMORY_FORMFACTOR_TSOP = 0x0a,
 172         MEMORY_FORMFACTOR_ROC = 0x0b,
 173         MEMORY_FORMFACTOR_RIMM = 0x0c,
 174         MEMORY_FORMFACTOR_SODIMM = 0x0d,
 175         MEMORY_FORMFACTOR_SRIMM = 0x0e,
 176         MEMORY_FORMFACTOR_FBDIMM = 0x0f,
 177         MEMORY_FORMFACTOR_DIE = 0x10,
 178 } smbios_memory_form_factor;
 179
 180 typedef enum {
 181         MEMORY_TYPE_OTHER = 0x01,
 182         MEMORY_TYPE_UNKNOWN = 0x02,
 183         MEMORY_TYPE_DRAM = 0x03,
 184         MEMORY_TYPE_EDRAM = 0x04,
 185         MEMORY_TYPE_VRAM = 0x05,
 186         MEMORY_TYPE_SRAM = 0x06,
 187         MEMORY_TYPE_RAM = 0x07,
 188         MEMORY_TYPE_ROM = 0x08,
 189         MEMORY_TYPE_FLASH = 0x09,
 190         MEMORY_TYPE_EEPROM = 0x0a,
 191         MEMORY_TYPE_FEPROM = 0x0b,
 192         MEMORY_TYPE_EPROM = 0x0c,
 193         MEMORY_TYPE_CDRAM = 0x0d,
 194         MEMORY_TYPE_3DRAM = 0x0e,
 195         MEMORY_TYPE_SDRAM = 0x0f,
 196         MEMORY_TYPE_SGRAM = 0x10,
 197         MEMORY_TYPE_RDRAM = 0x11,
 198         MEMORY_TYPE_DDR = 0x12,
 199         MEMORY_TYPE_DDR2 = 0x13,
 200         MEMORY_TYPE_DDR2_FBDIMM = 0x14,
 201         MEMORY_TYPE_DDR3 = 0x18,
 202         MEMORY_TYPE_FBD2 = 0x19,
 203         MEMORY_TYPE_DDR4 = 0x1a,
 204         MEMORY_TYPE_LPDDR = 0x1b,
 205         MEMORY_TYPE_LPDDR2 = 0x1c,
 206         MEMORY_TYPE_LPDDR3 = 0x1d,
 207         MEMORY_TYPE_LPDDR4 = 0x1e,
 208         MEMORY_TYPE_LOGICAL_NON_VOLATILE_DEVICE = 0x1f,
 209         MEMORY_TYPE_HBM = 0x20,
 210         MEMORY_TYPE_HBM2 = 0x21,
 211         MEMORY_TYPE_DDR5 = 0x22,
 212         MEMORY_TYPE_LPDDR5 = 0x23,
 213         MEMORY_TYPE_HBM3 = 0x24,
 214 } smbios_memory_type;
 215
 216 typedef enum {
 217         MEMORY_ARRAY_LOCATION_OTHER = 0x01,
 218         MEMORY_ARRAY_LOCATION_UNKNOWN = 0x02,
 219         MEMORY_ARRAY_LOCATION_SYSTEM_BOARD = 0x03,
 220         MEMORY_ARRAY_LOCATION_ISA_ADD_ON = 0x04,
 221         MEMORY_ARRAY_LOCATION_EISA_ADD_ON = 0x05,
 222         MEMORY_ARRAY_LOCATION_PCI_ADD_ON = 0x06,
 223         MEMORY_ARRAY_LOCATION_MCA_ADD_ON = 0x07,
 224         MEMORY_ARRAY_LOCATION_PCMCIA_ADD_ON = 0x08,
 225         MEMORY_ARRAY_LOCATION_PROPRIETARY_ADD_ON = 0x09,
 226         MEMORY_ARRAY_LOCATION_NUBUS = 0x0a,
 227         MEMORY_ARRAY_LOCATION_PC_98_C20_ADD_ON = 0xa0,
 228         MEMORY_ARRAY_LOCATION_PC_98_C24_ADD_ON = 0xa1,
 229         MEMORY_ARRAY_LOCATION_PC_98_E_ADD_ON = 0xa2,
 230         MEMORY_ARRAY_LOCATION_PC_98_LOCAL_BUS_ADD_ON = 0xa3,
 231         MEMORY_ARRAY_LOCATION_CXL_FLEXBUS_1_0_ADD_ON = 0xa4,
 232 } smbios_memory_array_location;
 233
 234 typedef enum {
 235         MEMORY_ARRAY_USE_OTHER = 0x01,
 236         MEMORY_ARRAY_USE_UNKNOWN = 0x02,
 237         MEMORY_ARRAY_USE_SYSTEM = 0x03,
 238         MEMORY_ARRAY_USE_VIDEO = 0x04,
 239         MEMORY_ARRAY_USE_FLASH = 0x05,
 240         MEMORY_ARRAY_USE_NVRAM = 0x06,
 241         MEMORY_ARRAY_USE_CACHE = 0x07,
 242 } smbios_memory_array_use;
 243
 244 typedef enum {
 245         MEMORY_ARRAY_ECC_OTHER = 0x01,
 246         MEMORY_ARRAY_ECC_UNKNOWN = 0x02,
 247         MEMORY_ARRAY_ECC_NONE = 0x03,
 248         MEMORY_ARRAY_ECC_PARITY = 0x04,
 249         MEMORY_ARRAY_ECC_SINGLE_BIT = 0x05,
 250         MEMORY_ARRAY_ECC_MULTI_BIT = 0x06,
 251         MEMORY_ARRAY_ECC_CRC = 0x07,
 252 } smbios_memory_array_ecc;
 253
 254 #define SMBIOS_STATE_SAFE 3
 255 typedef enum {
 256         SMBIOS_BIOS_INFORMATION = 0,
 257         SMBIOS_SYSTEM_INFORMATION = 1,
 258         SMBIOS_BOARD_INFORMATION = 2,
 259         SMBIOS_SYSTEM_ENCLOSURE = 3,
 260         SMBIOS_PROCESSOR_INFORMATION = 4,
 261         SMBIOS_CACHE_INFORMATION = 7,
 262         SMBIOS_PORT_CONNECTOR_INFORMATION = 8,
 263         SMBIOS_SYSTEM_SLOTS = 9,
 264         SMBIOS_OEM_STRINGS = 11,
 265         SMBIOS_EVENT_LOG = 15,
 266         SMBIOS_PHYS_MEMORY_ARRAY = 16,
 267         SMBIOS_MEMORY_DEVICE = 17,
 268         SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS = 19,
 269         SMBIOS_MEMORY_DEVICE_MAPPED_ADDRESS = 20,
 270         SMBIOS_TEMPERATURE_PROBE = 28,
 271         SMBIOS_SYSTEM_BOOT_INFORMATION = 32,
 272         SMBIOS_IPMI_DEVICE_INFORMATION = 38,
 273         SMBIOS_SYSTEM_POWER_SUPPLY = 39,
 274         SMBIOS_ONBOARD_DEVICES_EXTENDED_INFORMATION = 41,
 275         SMBIOS_TPM_DEVICE = 43,
 276         SMBIOS_END_OF_TABLE = 127,
 277 } smbios_struct_type_t;
 278
 279 struct smbios_entry {
 280         u8 anchor[4];
 281         u8 checksum;
 282         u8 length;
 283         u8 major_version;
 284         u8 minor_version;
 285         u16 max_struct_size;
 286         u8 entry_point_rev;
 287         u8 formwatted_area[5];
 288         u8 intermediate_anchor_string[5];
 289         u8 intermediate_checksum;
 290         u16 struct_table_length;
 291         u32 struct_table_address;
 292         u16 struct_count;
 293         u8 smbios_bcd_revision;
 294 } __packed;
 295
 296 struct smbios_entry30 {
 297         u8 anchor[5];
 298         u8 checksum;
 299         u8 length;
 300         u8 major_version;
 301         u8 minor_version;
 302         u8 smbios_doc_rev;
 303         u8 entry_point_rev;
 304         u8 reserved;
 305         u32 struct_table_length;
 306         u64 struct_table_address;
 307 } __packed;
 308
 309 struct smbios_header {
 310         u8 type;
 311         u8 length;
 312         u16 handle;
 313 } __packed;
 314
 315 struct smbios_type0 {
 316         struct smbios_header header;
 317         u8 vendor;
 318         u8 bios_version;
 319         u16 bios_start_segment;
 320         u8 bios_release_date;
 321         u8 bios_rom_size;
 322         u64 bios_characteristics;
 323         u8 bios_characteristics_ext1;
 324         u8 bios_characteristics_ext2;
 325         u8 system_bios_major_release;
 326         u8 system_bios_minor_release;
 327         u8 ec_major_release;
 328         u8 ec_minor_release;
 329         u16 extended_bios_rom_size;
 330         u8 eos[2];
 331 } __packed;
 332
 333 typedef enum {
 334         SMBIOS_WAKEUP_TYPE_RESERVED = 0x00,
 335         SMBIOS_WAKEUP_TYPE_OTHER = 0x01,
 336         SMBIOS_WAKEUP_TYPE_UNKNOWN = 0x02,
 337         SMBIOS_WAKEUP_TYPE_APM_TIMER = 0x03,
 338         SMBIOS_WAKEUP_TYPE_MODEM_RING = 0x04,
 339         SMBIOS_WAKEUP_TYPE_LAN_REMOTE = 0x05,
 340         SMBIOS_WAKEUP_TYPE_POWER_SWITCH = 0x06,
 341         SMBIOS_WAKEUP_TYPE_PCI_PME = 0x07,
 342         SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED = 0x08,
 343 } smbios_wakeup_type;
 344
 345 struct smbios_type1 {
 346         struct smbios_header header;
 347         u8 manufacturer;
 348         u8 product_name;
 349         u8 version;
 350         u8 serial_number;
 351         u8 uuid[16];
 352         u8 wakeup_type;
 353         u8 sku;
 354         u8 family;
 355         u8 eos[2];
 356 } __packed;
 357
 358 #define SMBIOS_FEATURE_FLAGS_HOSTING_BOARD              (1 << 0)
 359 #define SMBIOS_FEATURE_FLAGS_REQUIRES_DAUGHTER_CARD     (1 << 1)
 360 #define SMBIOS_FEATURE_FLAGS_REMOVABLE                  (1 << 2)
 361 #define SMBIOS_FEATURE_FLAGS_REPLACEABLE                (1 << 3)
 362 #define SMBIOS_FEATURE_FLAGS_HOT_SWAPPABLE              (1 << 4)
 363
 364 typedef enum {
 365         SMBIOS_BOARD_TYPE_UNKNOWN = 0x01,
 366         SMBIOS_BOARD_TYPE_OTHER = 0x02,
 367         SMBIOS_BOARD_TYPE_SERVER_BLADE = 0x03,
 368         SMBIOS_BOARD_TYPE_CONNECTIVITY_SWITCH = 0x04,
 369         SMBIOS_BOARD_TYPE_SYSTEM_MANAGEMENT_MODULE = 0x05,
 370         SMBIOS_BOARD_TYPE_PROCESSOR_MODULE = 0x06,
 371         SMBIOS_BOARD_TYPE_IO_MODULE = 0x07,
 372         SMBIOS_BOARD_TYPE_MEMORY_MODULE = 0x08,
 373         SMBIOS_BOARD_TYPE_DAUGHTER_BOARD = 0x09,
 374         SMBIOS_BOARD_TYPE_MOTHERBOARD = 0x0a,
 375         SMBIOS_BOARD_TYPE_PROCESSOR_MEMORY_MODULE = 0x0b,
 376         SMBIOS_BOARD_TYPE_PROCESSOR_IO_MODULE = 0x0c,
 377         SMBIOS_BOARD_TYPE_INTERCONNECT_BOARD = 0x0d,
 378 } smbios_board_type;
 379
 380 struct smbios_type2 {
 381         struct smbios_header header;
 382         u8 manufacturer;
 383         u8 product_name;
 384         u8 version;
 385         u8 serial_number;
 386         u8 asset_tag;
 387         u8 feature_flags;
 388         u8 location_in_chassis;
 389         u16 chassis_handle;
 390         u8 board_type;
 391         u8 eos[2];
 392 } __packed;
 393
 394 typedef enum {
 395         SMBIOS_ENCLOSURE_OTHER = 0x01,
 396         SMBIOS_ENCLOSURE_UNKNOWN = 0x02,
 397         SMBIOS_ENCLOSURE_DESKTOP = 0x03,
 398         SMBIOS_ENCLOSURE_LOW_PROFILE_DESKTOP = 0x04,
 399         SMBIOS_ENCLOSURE_PIZZA_BOX = 0x05,
 400         SMBIOS_ENCLOSURE_MINI_TOWER = 0x06,
 401         SMBIOS_ENCLOSURE_TOWER = 0x07,
 402         SMBIOS_ENCLOSURE_PORTABLE = 0x08,
 403         SMBIOS_ENCLOSURE_LAPTOP = 0x09,
 404         SMBIOS_ENCLOSURE_NOTEBOOK = 0x0a,
 405         SMBIOS_ENCLOSURE_HAND_HELD = 0x0b,
 406         SMBIOS_ENCLOSURE_DOCKING_STATION = 0x0c,
 407         SMBIOS_ENCLOSURE_ALL_IN_ONE = 0x0d,
 408         SMBIOS_ENCLOSURE_SUB_NOTEBOOK = 0x0e,
 409         SMBIOS_ENCLOSURE_SPACE_SAVING = 0x0f,
 410         SMBIOS_ENCLOSURE_LUNCH_BOX = 0x10,
 411         SMBIOS_ENCLOSURE_MAIN_SERVER_CHASSIS = 0x11,
 412         SMBIOS_ENCLOSURE_EXPANSION_CHASSIS = 0x12,
 413         SMBIOS_ENCLOSURE_SUBCHASSIS = 0x13,
 414         SMBIOS_ENCLOSURE_BUS_EXPANSION_CHASSIS = 0x14,
 415         SMBIOS_ENCLOSURE_PERIPHERAL_CHASSIS = 0x15,
 416         SMBIOS_ENCLOSURE_RAID_CHASSIS = 0x16,
 417         SMBIOS_ENCLOSURE_RACK_MOUNT_CHASSIS = 0x17,
 418         SMBIOS_ENCLOSURE_SEALED_CASE_PC = 0x18,
 419         SMBIOS_ENCLOSURE_MULTI_SYSTEM_CHASSIS = 0x19,
 420         SMBIOS_ENCLOSURE_COMPACT_PCI = 0x1a,
 421         SMBIOS_ENCLOSURE_ADVANCED_TCA = 0x1b,
 422         SMBIOS_ENCLOSURE_BLADE = 0x1c,
 423         SMBIOS_ENCLOSURE_BLADE_ENCLOSURE = 0x1d,
 424         SMBIOS_ENCLOSURE_TABLET = 0x1e,
 425         SMBIOS_ENCLOSURE_CONVERTIBLE = 0x1f,
 426         SMBIOS_ENCLOSURE_DETACHABLE = 0x20,
 427         SMBIOS_ENCLOSURE_IOT_GATEWAY = 0x21,
 428         SMBIOS_ENCLOSURE_EMBEDDED_PC = 0x22,
 429         SMBIOS_ENCLOSURE_MINI_PC = 0x23,
 430         SMBIOS_ENCLOSURE_STICK_PC = 0x24,
 431 } smbios_enclosure_type;
 432
 433 struct smbios_type3 {
 434         struct smbios_header header;
 435         u8 manufacturer;
 436         u8 _type;
 437         u8 version;
 438         u8 serial_number;
 439         u8 asset_tag_number;
 440         u8 bootup_state;
 441         u8 power_supply_state;
 442         u8 thermal_state;
 443         u8 security_status;
 444         u32 oem_defined;
 445         u8 height;
 446         u8 number_of_power_cords;
 447         u8 element_count;
 448         u8 element_record_length;
 449         u8 sku_number;
 450         u8 eos[2];
 451 } __packed;
 452
 453 struct smbios_type4 {
 454         struct smbios_header header;
 455         u8 socket_designation;
 456         u8 processor_type;
 457         u8 processor_family;
 458         u8 processor_manufacturer;
 459         u32 processor_id[2];
 460         u8 processor_version;
 461         u8 voltage;
 462         u16 external_clock;
 463         u16 max_speed;
 464         u16 current_speed;
 465         u8 status;
 466         u8 processor_upgrade;
 467         u16 l1_cache_handle;
 468         u16 l2_cache_handle;
 469         u16 l3_cache_handle;
 470         u8 serial_number;
 471         u8 asset_tag;
 472         u8 part_number;
 473         u8 core_count;
 474         u8 core_enabled;
 475         u8 thread_count;
 476         u16 processor_characteristics;
 477         u16 processor_family2;
 478         u16 core_count2;
 479         u16 core_enabled2;
 480         u16 thread_count2;
 481         u8 eos[2];
 482 } __packed;
 483
 484 /* defines for smbios_type4 */
 485
 486 #define SMBIOS_PROCESSOR_STATUS_POPULATED               (1 << 6)
 487 #define SMBIOS_PROCESSOR_STATUS_CPU_ENABLED             (1 << 0)
 488
 489 /* enum for socket type */
 490 enum smbios_processor_upgrade_field {
 491         PROCESSOR_UPGRADE_OTHER = 0x01,
 492         PROCESSOR_UPGRADE_UNKNOWN = 0x02,
 493         PROCESSOR_UPGRADE_DAUGHTER_BOARD = 0x03,
 494         PROCESSOR_UPGRADE_ZIF_SOCKET = 0x04,
 495         PROCESSOR_UPGRADE_REPLACEABLE_PIGGY_BACK = 0x05,
 496         PROCESSOR_UPGRADE_NONE = 0x06,
 497         PROCESSOR_UPGRADE_LIF_SOCKET = 0x07,
 498         PROCESSOR_UPGRADE_SLOT_1 = 0x08,
 499         PROCESSOR_UPGRADE_SLOT_2 = 0x09,
 500         PROCESSOR_UPGRADE_370_PIN_SOCKET = 0x0a,
 501         PROCESSOR_UPGRADE_SLOT_A = 0x0b,
 502         PROCESSOR_UPGRADE_SLOT_M = 0x0c,
 503         PROCESSOR_UPGRADE_SOCKET_423 = 0x0d,
 504         PROCESSOR_UPGRADE_SOCKET_A = 0x0e,
 505         PROCESSOR_UPGRADE_SOCKET_478 = 0x0f,
 506         PROCESSOR_UPGRADE_SOCKET_754 = 0x10,
 507         PROCESSOR_UPGRADE_SOCKET_940 = 0x11,
 508         PROCESSOR_UPGRADE_SOCKET_939 = 0x12,
 509         PROCESSOR_UPGRADE_SOCKET_MPGA604 = 0x13,
 510         PROCESSOR_UPGRADE_SOCKET_LGA771 = 0x14,
 511         PROCESSOR_UPGRADE_SOCKET_LGA775 = 0x15,
 512         PROCESSOR_UPGRADE_SOCKET_S1 = 0x16,
 513         PROCESSOR_UPGRADE_SOCKET_AM2 = 0x17,
 514         PROCESSOR_UPGRADE_SOCKET_F = 0x18,
 515         PROCESSOR_UPGRADE_SOCKET_LGA1366 = 0x19,
 516         PROCESSOR_UPGRADE_SOCKET_G34 = 0x1a,
 517         PROCESSOR_UPGRADE_SOCKET_AM3 = 0x1b,
 518         PROCESSOR_UPGRADE_SOCKET_C32 = 0x1c,
 519         PROCESSOR_UPGRADE_SOCKET_LGA1156 = 0x1d,
 520         PROCESSOR_UPGRADE_SOCKET_LGA1567 = 0x1e,
 521         PROCESSOR_UPGRADE_SOCKET_PGA988A = 0x1f,
 522         PROCESSOR_UPGRADE_SOCKET_BGA1288 = 0x20,
 523         PROCESSOR_UPGRADE_SOCKET_RPGA988B = 0x21,
 524         PROCESSOR_UPGRADE_SOCKET_BGA1023 = 0x22,
 525         PROCESSOR_UPGRADE_SOCKET_BGA1224 = 0x23,
 526         PROCESSOR_UPGRADE_SOCKET_LGA1155 = 0x24,
 527         PROCESSOR_UPGRADE_SOCKET_LGA1356 = 0x25,
 528         PROCESSOR_UPGRADE_SOCKET_LGA2011 = 0x26,
 529         PROCESSOR_UPGRADE_SOCKET_FS1 = 0x27,
 530         PROCESSOR_UPGRADE_SOCKET_FS2 = 0x28,
 531         PROCESSOR_UPGRADE_SOCKET_FM1 = 0x29,
 532         PROCESSOR_UPGRADE_SOCKET_FM2 = 0x2a,
 533         PROCESSOR_UPGRADE_SOCKET_LGA2011_3 = 0x2b,
 534         PROCESSOR_UPGRADE_SOCKET_LGA1356_3 = 0x2c,
 535         PROCESSOR_UPGRADE_SOCKET_LGA1150 = 0x2d,
 536         PROCESSOR_UPGRADE_SOCKET_BGA1168 = 0x2e,
 537         PROCESSOR_UPGRADE_SOCKET_BGA1234 = 0x2f,
 538         PROCESSOR_UPGRADE_SOCKET_BGA1364 = 0x30,
 539         PROCESSOR_UPGRADE_SOCKET_AM4 = 0x31,
 540         PROCESSOR_UPGRADE_SOCKET_LGA1151 = 0x32,
 541         PROCESSOR_UPGRADE_SOCKET_BGA1356 = 0x33,
 542         PROCESSOR_UPGRADE_SOCKET_BGA1440 = 0x34,
 543         PROCESSOR_UPGRADE_SOCKET_BGA1515 = 0x35,
 544         PROCESSOR_UPGRADE_SOCKET_LGA3647_1 = 0x36,
 545         PROCESSOR_UPGRADE_SOCKET_SP3 = 0x37,
 546         PROCESSOR_UPGRADE_SOCKET_SP3R2 = 0x38,
 547         PROCESSOR_UPGRADE_SOCKET_LGA2066 = 0x39,
 548         PROCESSOR_UPGRADE_SOCKET_BGA1392 = 0x3a,
 549         PROCESSOR_UPGRADE_SOCKET_BGA1510 = 0x3b,
 550         PROCESSOR_UPGRADE_SOCKET_BGA1528 = 0x3c,
 551         PROCESSOR_UPGRADE_SOCKET_LGA4189 = 0x3d,
 552         PROCESSOR_UPGRADE_SOCKET_LGA1200 = 0x3e,
 553         PROCESSOR_UPGRADE_SOCKET_LGA4677 = 0x3f,
 554         PROCESSOR_UPGRADE_SOCKET_LGA1700 = 0x40,
 555         PROCESSOR_UPGRADE_SOCKET_BGA1744 = 0x41,
 556         PROCESSOR_UPGRADE_SOCKET_BGA1781 = 0x42,
 557         PROCESSOR_UPGRADE_SOCKET_BGA1211 = 0x43,
 558         PROCESSOR_UPGRADE_SOCKET_BGA2422 = 0x44,
 559         PROCESSOR_UPGRADE_SOCKET_LGA1211 = 0x45,
 560         PROCESSOR_UPGRADE_SOCKET_LGA2422 = 0x46,
 561         PROCESSOR_UPGRADE_SOCKET_LGA5773 = 0x47,
 562         PROCESSOR_UPGRADE_SOCKET_BGA5773 = 0x48,
 563 };
 564
 565 /* defines for processor family */
 566 #define SMBIOS_PROCESSOR_FAMILY_OTHER                   0x01
 567 #define SMBIOS_PROCESSOR_FAMILY_UNKNOWN                 0x02
 568 #define SMBIOS_PROCESSOR_FAMILY_XEON                    0xb3
 569
 570 /* defines for processor characteristics */
 571 #define PROCESSOR_64BIT_CAPABLE                         (1 << 2)
 572 #define PROCESSOR_MULTI_CORE                            (1 << 3)
 573 #define PROCESSOR_POWER_PERFORMANCE_CONTROL             (1 << 7)
 574
 575 /* defines for supported_sram_type/current_sram_type */
 576
 577 #define SMBIOS_CACHE_SRAM_TYPE_OTHER                    (1 << 0)
 578 #define SMBIOS_CACHE_SRAM_TYPE_UNKNOWN                  (1 << 1)
 579 #define SMBIOS_CACHE_SRAM_TYPE_NON_BURST                (1 << 2)
 580 #define SMBIOS_CACHE_SRAM_TYPE_BURST                    (1 << 3)
 581 #define SMBIOS_CACHE_SRAM_TYPE_PIPELINE_BURST           (1 << 4)
 582 #define SMBIOS_CACHE_SRAM_TYPE_SYNCHRONOUS              (1 << 5)
 583 #define SMBIOS_CACHE_SRAM_TYPE_ASYNCHRONOUS             (1 << 6)
 584
 585 /* enum for error_correction_type */
 586
 587 enum smbios_cache_error_corr {
 588         SMBIOS_CACHE_ERROR_CORRECTION_OTHER = 1,
 589         SMBIOS_CACHE_ERROR_CORRECTION_UNKNOWN,
 590         SMBIOS_CACHE_ERROR_CORRECTION_NONE,
 591         SMBIOS_CACHE_ERROR_CORRECTION_PARITY,
 592         SMBIOS_CACHE_ERROR_CORRECTION_SINGLE_BIT,
 593         SMBIOS_CACHE_ERROR_CORRECTION_MULTI_BIT,
 594 };
 595
 596 /* enum for system_cache_type */
 597
 598 enum smbios_cache_type {
 599         SMBIOS_CACHE_TYPE_OTHER = 1,
 600         SMBIOS_CACHE_TYPE_UNKNOWN,
 601         SMBIOS_CACHE_TYPE_INSTRUCTION,
 602         SMBIOS_CACHE_TYPE_DATA,
 603         SMBIOS_CACHE_TYPE_UNIFIED,
 604 };
 605
 606 /* enum for associativity */
 607
 608 enum smbios_cache_associativity {
 609         SMBIOS_CACHE_ASSOCIATIVITY_OTHER = 1,
 610         SMBIOS_CACHE_ASSOCIATIVITY_UNKNOWN,
 611         SMBIOS_CACHE_ASSOCIATIVITY_DIRECT,
 612         SMBIOS_CACHE_ASSOCIATIVITY_2WAY,
 613         SMBIOS_CACHE_ASSOCIATIVITY_4WAY,
 614         SMBIOS_CACHE_ASSOCIATIVITY_FULL,
 615         SMBIOS_CACHE_ASSOCIATIVITY_8WAY,
 616         SMBIOS_CACHE_ASSOCIATIVITY_16WAY,
 617         SMBIOS_CACHE_ASSOCIATIVITY_12WAY,
 618         SMBIOS_CACHE_ASSOCIATIVITY_24WAY,
 619         SMBIOS_CACHE_ASSOCIATIVITY_32WAY,
 620         SMBIOS_CACHE_ASSOCIATIVITY_48WAY,
 621         SMBIOS_CACHE_ASSOCIATIVITY_64WAY,
 622         SMBIOS_CACHE_ASSOCIATIVITY_20WAY,
 623 };
 624
 625 /* defines for cache_configuration */
 626
 627 #define SMBIOS_CACHE_CONF_LEVEL(x) ((((x) - 1) & 0x7) << 0)
 628 #define SMBIOS_CACHE_CONF_LOCATION(x) (((x) & 0x3) << 5)
 629 #define SMBIOS_CACHE_CONF_ENABLED(x) (((x) & 0x1) << 7)
 630 #define SMBIOS_CACHE_CONF_OPERATION_MODE(x) (((x) & 0x3) << 8)
 631
 632 /* defines for max_cache_size and installed_size */
 633
 634 #define SMBIOS_CACHE_SIZE_UNIT_1KB              (0 << 15)
 635 #define SMBIOS_CACHE_SIZE_UNIT_64KB             (1 << 15)
 636 #define SMBIOS_CACHE_SIZE_MASK                  0x7fff
 637 #define SMBIOS_CACHE_SIZE_OVERFLOW              0xffff
 638
 639 #define SMBIOS_CACHE_SIZE2_UNIT_1KB             (0 << 31)
 640 #define SMBIOS_CACHE_SIZE2_UNIT_64KB            (1UL << 31)
 641 #define SMBIOS_CACHE_SIZE2_MASK                 0x7fffffff
 642
 643 /* define for cache operation mode */
 644
 645 #define SMBIOS_CACHE_OP_MODE_WRITE_THROUGH 0
 646 #define SMBIOS_CACHE_OP_MODE_WRITE_BACK 1
 647 #define SMBIOS_CACHE_OP_MODE_VARIES_WITH_MEMORY_ADDRESS 2
 648 #define SMBIOS_CACHE_OP_MODE_UNKNOWN 3
 649
 650 struct smbios_type7 {
 651         struct smbios_header header;
 652         u8 socket_designation;
 653         u16 cache_configuration;
 654         u16 max_cache_size;
 655         u16 installed_size;
 656         u16 supported_sram_type;
 657         u16 current_sram_type;
 658         u8 cache_speed;
 659         u8 error_correction_type;
 660         u8 system_cache_type;
 661         u8 associativity;
 662         u32 max_cache_size2;
 663         u32 installed_size2;
 664         u8 eos[2];
 665 } __packed;
 666
 667 /* enum for connector types */
 668 typedef enum {
 669         CONN_NONE = 0x00,
 670         CONN_CENTRONICS = 0x01,
 671         CONN_MINI_CENTRONICS = 0x02,
 672         CONN_PROPRIETARY = 0x03,
 673         CONN_DB_25_PIN_MALE = 0x04,
 674         CONN_DB_25_PIN_FEMALE = 0x05,
 675         CONN_DB_15_PIN_MALE = 0x06,
 676         CONN_DB_15_PIN_FEMALE = 0x07,
 677         CONN_DB_9_PIN_MALE = 0x08,
 678         CONN_DB_9_PIN_FEMALE = 0x09,
 679         CONN_RJ_11 = 0x0A,
 680         CONN_RJ_45 = 0x0B,
 681         CONN_50_PIN_MINI_SCSI = 0x0C,
 682         CONN_MINI_DIN = 0x0D,
 683         CONN_MICRO_DIN = 0x0E,
 684         CONN_PS_2 = 0x0F,
 685         CONN_INFRARED = 0x10,
 686         CONN_HP_HIL = 0x11,
 687         CONN_ACCESS_BUS_USB = 0x12,
 688         CONN_SSA_SCSI = 0x13,
 689         CONN_CIRCULAR_DIN_8_MALE = 0x14,
 690         CONN_CIRCULAR_DIN_8_FEMALE = 0x15,
 691         CONN_ON_BOARD_IDE = 0x16,
 692         CONN_ON_BOARD_FLOPPY = 0x17,
 693         CONN_9_PIN_DUAL_INLINE = 0x18,
 694         CONN_25_PIN_DUAL_INLINE = 0x19,
 695         CONN_50_PIN_DUAL_INLINE = 0x1A,
 696         CONN_68_PIN_DUAL_INLINE = 0x1B,
 697         CONN_ON_BOARD_SOUND_INPUT_FROM_CD_ROM = 0x1C,
 698         CONN_MINI_CENTRONICS_TYPE14 = 0x1D,
 699         CONN_MINI_CENTRONICS_TYPE26 = 0x1E,
 700         CONN_MINI_JACK_HEADPHONES = 0x1F,
 701         CONN_BNC = 0x20,
 702         CONN_1394 = 0x21,
 703         CONN_SAS_SATA = 0x22,
 704         CONN_USB_TYPE_C = 0x23,
 705         CONN_PC_98 = 0xA0,
 706         CONN_PC_98_HIRESO = 0xA1,
 707         CONN_PC_H98 = 0xA2,
 708         CONN_PC98_NOTE = 0xA3,
 709         CONN_PC_98_FULL = 0xA4,
 710         CONN_OTHER = 0xFF,
 711 } type8_connector_types;
 712
 713 /* enum for port types */
 714 typedef enum {
 715         TYPE_NONE_PORT = 0x00,
 716         TYPE_PARALLEL_PORT_XT_AT_COMPATIBLE = 0x01,
 717         TYPE_PARALLEL_PORT_PS_2 = 0x02,
 718         TYPE_PARALLEL_PORT_ECP = 0x03,
 719         TYPE_PARALLEL_PORT_EPP = 0x04,
 720         TYPE_PARALLEL_PORT_ECP_EPP = 0x05,
 721         TYPE_SERIAL_PORT_XT_AT_COMPATIBLE = 0x06,
 722         TYPE_SERIAL_PORT_16450_COMPATIBLE = 0x07,
 723         TYPE_SERIAL_PORT_16550_COMPATIBLE = 0x08,
 724         TYPE_SERIAL_PORT_16550A_COMPATIBLE = 0x09,
 725         TYPE_SCSI_PORT = 0x0A,
 726         TYPE_MIDI_PORT = 0x0B,
 727         TYPE_JOY_STICK_PORT = 0x0C,
 728         TYPE_KEYBOARD_PORT = 0x0D,
 729         TYPE_MOUSE_PORT = 0x0E,
 730         TYPE_SSA_SCSI = 0x0F,
 731         TYPE_USB = 0x10,
 732         TYPE_FIREWIRE_IEEE_P1394 = 0x11,
 733         TYPE_PCMCIA_TYPE_I = 0x12,
 734         TYPE_PCMCIA_TYPE_II = 0x13,
 735         TYPE_PCMCIA_TYPE_III = 0x14,
 736         TYPE_CARDBUS = 0x15,
 737         TYPE_ACCESS_BUS_PORT = 0x16,
 738         TYPE_SCSI_II = 0x17,
 739         TYPE_SCSI_WIDE = 0x18,
 740         TYPE_PC_98 = 0x19,
 741         TYPE_PC_98_HIRESO = 0x1A,
 742         TYPE_PC_H98 = 0x1B,
 743         TYPE_VIDEO_PORT = 0x1C,
 744         TYPE_AUDIO_PORT = 0x1D,
 745         TYPE_MODEM_PORT = 0x1E,
 746         TYPE_NETWORK_PORT = 0x1F,
 747         TYPE_SATA = 0x20,
 748         TYPE_SAS = 0x21,
 749         TYPE_MFDP = 0x22,
 750         TYPE_THUNDERBOLT = 0x23,
 751         TYPE_8251_COMPATIBLE = 0xA0,
 752         TYPE_8251_FIFO_COMPATIBLE = 0xA1,
 753         TYPE_OTHER_PORT = 0xFF,
 754 } type8_port_types;
 755
 756 struct port_information {
 757         const char *internal_reference_designator;
 758         type8_connector_types internal_connector_type;
 759         const char *external_reference_designator;
 760         type8_connector_types external_connector_type;
 761         type8_port_types port_type;
 762 };
 763
 764 struct smbios_type8 {
 765         struct smbios_header header;
 766         u8 internal_reference_designator;
 767         u8 internal_connector_type;
 768         u8 external_reference_designator;
 769         u8 external_connector_type;
 770         u8 port_type;
 771         u8 eos[2];
 772 } __packed;
 773
 774 /* System Slots - Slot Type */
 775 enum misc_slot_type {
 776         SlotTypeOther = 0x01,
 777         SlotTypeUnknown = 0x02,
 778         SlotTypeIsa = 0x03,
 779         SlotTypeMca = 0x04,
 780         SlotTypeEisa = 0x05,
 781         SlotTypePci = 0x06,
 782         SlotTypePcmcia = 0x07,
 783         SlotTypeVlVesa = 0x08,
 784         SlotTypeProprietary = 0x09,
 785         SlotTypeProcessorCardSlot = 0x0A,
 786         SlotTypeProprietaryMemoryCardSlot = 0x0B,
 787         SlotTypeIORiserCardSlot = 0x0C,
 788         SlotTypeNuBus = 0x0D,
 789         SlotTypePci66MhzCapable = 0x0E,
 790         SlotTypeAgp = 0x0F,
 791         SlotTypeApg2X = 0x10,
 792         SlotTypeAgp4X = 0x11,
 793         SlotTypePciX = 0x12,
 794         SlotTypeAgp8X = 0x13,
 795         SlotTypeM2Socket1_DP = 0x14,
 796         SlotTypeM2Socket1_SD = 0x15,
 797         SlotTypeM2Socket2 = 0x16,
 798         SlotTypeM2Socket3 = 0x17,
 799         SlotTypeMxmTypeI = 0x18,
 800         SlotTypeMxmTypeII = 0x19,
 801         SlotTypeMxmTypeIIIStandard = 0x1A,
 802         SlotTypeMxmTypeIIIHe = 0x1B,
 803         SlotTypeMxmTypeIV = 0x1C,
 804         SlotTypeMxm30TypeA = 0x1D,
 805         SlotTypeMxm30TypeB = 0x1E,
 806         SlotTypePciExpressGen2Sff_8639 = 0x1F,
 807         SlotTypePciExpressGen3Sff_8639 = 0x20,
 808         SlotTypePciExpressMini52pinWithBSKO = 0x21,
 809         SlotTypePciExpressMini52pinWithoutBSKO = 0x22,
 810         SlotTypePciExpressMini76pin = 0x23,
 811         SlotTypePciExpressOCPNIC30SFF = 0x26,
 812         SlotTypePC98C20 = 0xA0,
 813         SlotTypePC98C24 = 0xA1,
 814         SlotTypePC98E = 0xA2,
 815         SlotTypePC98LocalBus = 0xA3,
 816         SlotTypePC98Card = 0xA4,
 817         SlotTypePciExpress = 0xA5,
 818         SlotTypePciExpressX1 = 0xA6,
 819         SlotTypePciExpressX2 = 0xA7,
 820         SlotTypePciExpressX4 = 0xA8,
 821         SlotTypePciExpressX8 = 0xA9,
 822         SlotTypePciExpressX16 = 0xAA,
 823         SlotTypePciExpressGen2 = 0xAB,
 824         SlotTypePciExpressGen2X1 = 0xAC,
 825         SlotTypePciExpressGen2X2 = 0xAD,
 826         SlotTypePciExpressGen2X4 = 0xAE,
 827         SlotTypePciExpressGen2X8 = 0xAF,
 828         SlotTypePciExpressGen2X16 = 0xB0,
 829         SlotTypePciExpressGen3 = 0xB1,
 830         SlotTypePciExpressGen3X1 = 0xB2,
 831         SlotTypePciExpressGen3X2 = 0xB3,
 832         SlotTypePciExpressGen3X4 = 0xB4,
 833         SlotTypePciExpressGen3X8 = 0xB5,
 834         SlotTypePciExpressGen3X16 = 0xB6,
 835         SlotTypePciExpressGen4 = 0xB8,
 836         SlotTypePciExpressGen4x1 = 0xB9,
 837         SlotTypePciExpressGen4x2 = 0xBA,
 838         SlotTypePciExpressGen4x4 = 0xBB,
 839         SlotTypePciExpressGen4x8 = 0xBC,
 840         SlotTypePciExpressGen4x16 = 0xBD,
 841         SlotTypePciExpressGen5 = 0xBE,
 842         SlotTypePciExpressGen5x1 = 0xBF,
 843         SlotTypePciExpressGen5x2 = 0xC0,
 844         SlotTypePciExpressGen5x4 = 0xC1,
 845         SlotTypePciExpressGen5x8 = 0xC2,
 846         SlotTypePciExpressGen5x16 = 0xC3
 847 };
 848
 849 /* System Slots - Slot Data Bus Width. */
 850 enum slot_data_bus_bandwidth {
 851         SlotDataBusWidthOther = 0x01,
 852         SlotDataBusWidthUnknown = 0x02,
 853         SlotDataBusWidth8Bit = 0x03,
 854         SlotDataBusWidth16Bit = 0x04,
 855         SlotDataBusWidth32Bit = 0x05,
 856         SlotDataBusWidth64Bit = 0x06,
 857         SlotDataBusWidth128Bit = 0x07,
 858         SlotDataBusWidth1X = 0x08,
 859         SlotDataBusWidth2X = 0x09,
 860         SlotDataBusWidth4X = 0x0A,
 861         SlotDataBusWidth8X = 0x0B,
 862         SlotDataBusWidth12X = 0x0C,
 863         SlotDataBusWidth16X = 0x0D,
 864         SlotDataBusWidth32X = 0x0E
 865 };
 866
 867 /* System Slots - Current Usage. */
 868 enum misc_slot_usage {
 869         SlotUsageOther        = 0x01,
 870         SlotUsageUnknown      = 0x02,
 871         SlotUsageAvailable    = 0x03,
 872         SlotUsageInUse        = 0x04,
 873         SlotUsageUnavailable  = 0x05
 874 };
 875
 876 /* System Slots - Slot Length.*/
 877 enum misc_slot_length {
 878         SlotLengthOther = 0x01,
 879         SlotLengthUnknown = 0x02,
 880         SlotLengthShort = 0x03,
 881         SlotLengthLong = 0x04
 882 };
 883
 884 /* System Slots - Slot Characteristics 1. */
 885 #define SMBIOS_SLOT_UNKNOWN             (1 << 0)
 886 #define SMBIOS_SLOT_5V                  (1 << 1)
 887 #define SMBIOS_SLOT_3P3V                (1 << 2)
 888 #define SMBIOS_SLOT_SHARED              (1 << 3)
 889 #define SMBIOS_SLOT_PCCARD_16           (1 << 4)
 890 #define SMBIOS_SLOT_PCCARD_CARDBUS      (1 << 5)
 891 #define SMBIOS_SLOT_PCCARD_ZOOM         (1 << 6)
 892 #define SMBIOS_SLOT_PCCARD_MODEM_RING   (1 << 7)
 893 /* System Slots - Slot Characteristics 2. */
 894 #define SMBIOS_SLOT_PME         (1 << 0)
 895 #define SMBIOS_SLOT_HOTPLUG     (1 << 1)
 896 #define SMBIOS_SLOT_SMBUS       (1 << 2)
 897 #define SMBIOS_SLOT_BIFURCATION (1 << 3)
 898
 899 struct slot_peer_groups {
 900         u16 peer_seg_num;
 901         u8 peer_bus_num;
 902         u8 peer_dev_fn_num;
 903         u8 peer_data_bus_width;
 904 } __packed;
 905
 906 struct smbios_type9 {
 907         struct smbios_header header;
 908         u8 slot_designation;
 909         u8 slot_type;
 910         u8 slot_data_bus_width;
 911         u8 current_usage;
 912         u8 slot_length;
 913         u16 slot_id;
 914         u8 slot_characteristics_1;
 915         u8 slot_characteristics_2;
 916         u16 segment_group_number;
 917         u8 bus_number;
 918         u8 device_function_number;
 919         u8 data_bus_width;
 920         u8 peer_group_count;
 921         struct slot_peer_groups peer[0];
 922         u8 eos[2];
 923 } __packed;
 924
 925 struct smbios_type11 {
 926         struct smbios_header header;
 927         u8 count;
 928         u8 eos[2];
 929 } __packed;
 930
 931 struct smbios_type15 {
 932         struct smbios_header header;
 933         u16 area_length;
 934         u16 header_offset;
 935         u16 data_offset;
 936         u8 access_method;
 937         u8 log_status;
 938         u32 change_token;
 939         u32 address;
 940         u8 header_format;
 941         u8 log_type_descriptors;
 942         u8 log_type_descriptor_length;
 943         u8 eos[2];
 944 } __packed;
 945
 946 enum {
 947         SMBIOS_EVENTLOG_ACCESS_METHOD_IO8 = 0,
 948         SMBIOS_EVENTLOG_ACCESS_METHOD_IO8X2,
 949         SMBIOS_EVENTLOG_ACCESS_METHOD_IO16,
 950         SMBIOS_EVENTLOG_ACCESS_METHOD_MMIO32,
 951         SMBIOS_EVENTLOG_ACCESS_METHOD_GPNV,
 952 };
 953
 954 enum {
 955         SMBIOS_EVENTLOG_STATUS_VALID = 1, /* Bit 0 */
 956         SMBIOS_EVENTLOG_STATUS_FULL  = 2, /* Bit 1 */
 957 };
 958
 959 #define SMBIOS_USE_EXTENDED_MAX_CAPACITY        (1ULL << 31)
 960
 961 struct smbios_type16 {
 962         struct smbios_header header;
 963         u8 location;
 964         u8 use;
 965         u8 memory_error_correction;
 966         u32 maximum_capacity;
 967         u16 memory_error_information_handle;
 968         u16 number_of_memory_devices;
 969         u64 extended_maximum_capacity;
 970         u8 eos[2];
 971 } __packed;
 972
 973 struct smbios_type17 {
 974         struct smbios_header header;
 975         u16 phys_memory_array_handle;
 976         u16 memory_error_information_handle;
 977         u16 total_width;
 978         u16 data_width;
 979         u16 size;
 980         u8 form_factor;
 981         u8 device_set;
 982         u8 device_locator;
 983         u8 bank_locator;
 984         u8 memory_type;
 985         u16 type_detail;
 986         u16 speed;
 987         u8 manufacturer;
 988         u8 serial_number;
 989         u8 asset_tag;
 990         u8 part_number;
 991         u8 attributes;
 992         u32 extended_size;
 993         u16 clock_speed;
 994         u16 minimum_voltage;
 995         u16 maximum_voltage;
 996         u16 configured_voltage;
 997         u8 eos[2];
 998 } __packed;
 999
1000 struct smbios_type19 {
1001         struct smbios_header header;
1002         u32 starting_address;
1003         u32 ending_address;
1004         u16 memory_array_handle;
1005         u8 partition_width;
1006         u64 extended_starting_address;
1007         u64 extended_ending_address;
1008         u8 eos[2];
1009 } __packed;
1010
1011 struct smbios_type20 {
1012         struct smbios_header header;
1013         u32 addr_start;
1014         u32 addr_end;
1015         u16 memory_device_handle;
1016         u16 memory_array_mapped_address_handle;
1017         u8 partition_row_pos;
1018         u8 interleave_pos;
1019         u8 interleave_depth;
1020         u64 ext_addr_start;
1021         u64 ext_addr_end;
1022         u8 eos[2];
1023 } __packed;
1024
1025 /* Bit[7..5] = Temp status */
1026 enum smbios_temp_status {
1027         SMBIOS_TEMP_STATUS_OTHER = 0x01,
1028         SMBIOS_TEMP_STATUS_UNKNOWN,
1029         SMBIOS_TEMP_STATUS_OK,
1030         SMBIOS_TEMP_STATUS_NONCRITICAL,
1031         SMBIOS_TEMP_STATUS_CRITICAL,
1032         SMBIOS_TEMP_STATUS_NONREC,                      // Non-Recoverable.
1033 };
1034
1035 /* Bit[4..0] = Temp location */
1036 enum smbios_temp_location {
1037         SMBIOS_TEMP_LOCATION_OTHER = 0x01,
1038         SMBIOS_TEMP_LOCATION_UNKNOWN,
1039         SMBIOS_TEMP_LOCATION_PROCESSOR,
1040         SMBIOS_TEMP_LOCATION_DISK,
1041         SMBIOS_TEMP_LOCATION_BAY,                       // Peripheral Bay.
1042         SMBIOS_TEMP_LOCATION_SMM,                       // System Management Module.
1043         SMBIOS_TEMP_LOCATION_BOARD,                     // Motherboard.
1044         SMBIOS_TEMP_LOCATION_MM,                        // Memory.
1045         SMBIOS_TEMP_LOCATION_PM,                        // Processor Module.
1046         SMBIOS_TEMP_LOCATION_POW,                       // Power Unit.
1047         SMBIOS_TEMP_LOCATION_ADDCARD,
1048 };
1049
1050 struct smbios_type28 {
1051         struct smbios_header header;
1052         u8 description;
1053         u8 location_and_status;
1054         u16 maximum_value;
1055         u16 minimum_value;
1056         u16 resolution;
1057         u16 tolerance;
1058         u16 accuracy;
1059         u32 oem_defined;
1060         u16 nominal_value;
1061         u8 eos[2];
1062 } __packed;
1063
1064
1065 struct smbios_type32 {
1066         struct smbios_header header;
1067         u8 reserved[6];
1068         u8 boot_status;
1069         u8 eos[2];
1070 } __packed;
1071
1072 struct smbios_type38 {
1073         struct smbios_header header;
1074         u8 interface_type;
1075         u8 ipmi_rev;
1076         u8 i2c_slave_addr;
1077         u8 nv_storage_addr;
1078         u64 base_address;
1079         u8 base_address_modifier;
1080         u8 irq;
1081         u8 eos[2];
1082 } __packed;
1083
1084 enum smbios_bmc_interface_type {
1085         SMBIOS_BMC_INTERFACE_UNKNOWN = 0,
1086         SMBIOS_BMC_INTERFACE_KCS,
1087         SMBIOS_BMC_INTERFACE_SMIC,
1088         SMBIOS_BMC_INTERFACE_BLOCK,
1089         SMBIOS_BMC_INTERFACE_SMBUS,
1090 };
1091
1092 typedef enum {
1093         PowerSupplyTypeOther = 1,
1094         PowerSupplyTypeUnknown = 2,
1095         PowerSupplyTypeLinear = 3,
1096         PowerSupplyTypeSwitching = 4,
1097         PowerSupplyTypeBattery = 5,
1098         PowerSupplyTypeUps = 6,
1099         PowerSupplyTypeConverter = 7,
1100         PowerSupplyTypeRegulator = 8
1101 } power_supply_type;
1102
1103 typedef enum {
1104         PowerSupplyStatusOther = 1,
1105         PowerSupplyStatusUnknown = 2,
1106         PowerSupplyStatusOk = 3,
1107         PowerSupplyStatusNonCritical = 4,
1108         PowerSupplyStatusCritical = 5
1109 } power_supply_status;
1110
1111 typedef enum {
1112         PowerSupplyInputVoltageRangeSwitchingOther = 1,
1113         PowerSupplyInputVoltageRangeSwitchingUnknown = 2,
1114         PowerSupplyInputVoltageRangeSwitchingManual = 3,
1115         PowerSupplyInputVoltageRangeSwitchingAutoSwitch = 4,
1116         PowerSupplyInputVoltageRangeSwitchingWideRange = 5,
1117         PowerSupplyInputVoltageRangeSwitchingNotApplicable = 6
1118 } power_supply_input_voltage_range_switching;
1119
1120 struct power_supply_ch {
1121         u16 reserved                            :2;
1122         u16 power_supply_type                   :4;
1123         u16 power_supply_status                 :3;
1124         u16 input_voltage_range_switch          :4;
1125         u16 power_supply_unplugged              :1;
1126         u16 power_supply_present                :1;
1127         u16 power_supply_hot_replaceble         :1;
1128 };
1129
1130 struct smbios_type39 {
1131         struct smbios_header header;
1132         u8 power_unit_group;
1133         u8 location;
1134         u8 device_name;
1135         u8 manufacturer;
1136         u8 serial_number;
1137         u8 asset_tag_number;
1138         u8 model_part_number;
1139         u8 revision_level;
1140         u16 max_power_capacity;
1141         u16 power_supply_characteristics;
1142         u16 input_voltage_probe_handle;
1143         u16 cooling_device_handle;
1144         u16 input_current_probe_handle;
1145         u8 eos[2];
1146 } __packed;
1147
1148 int smbios_write_type39(unsigned long *current, int *handle,
1149                         u8 unit_group, const char *loc, const char *dev_name,
1150                         const char *man, const char *serial_num,
1151                         const char *tag_num, const char *part_num,
1152                         const char *rev_lvl, u16 max_pow_cap,
1153                         const struct power_supply_ch *ps_ch);
1154
1155 typedef enum {
1156         SMBIOS_DEVICE_TYPE_OTHER = 0x01,
1157         SMBIOS_DEVICE_TYPE_UNKNOWN,
1158         SMBIOS_DEVICE_TYPE_VIDEO,
1159         SMBIOS_DEVICE_TYPE_SCSI,
1160         SMBIOS_DEVICE_TYPE_ETHERNET,
1161         SMBIOS_DEVICE_TYPE_TOKEN_RING,
1162         SMBIOS_DEVICE_TYPE_SOUND,
1163         SMBIOS_DEVICE_TYPE_PATA,
1164         SMBIOS_DEVICE_TYPE_SATA,
1165         SMBIOS_DEVICE_TYPE_SAS,
1166         SMBIOS_DEVICE_TYPE_WIRELESS_LAN,
1167         SMBIOS_DEVICE_TYPE_BLUETOOTH,
1168         SMBIOS_DEVICE_TYPE_WWAN,
1169         SMBIOS_DEVICE_TYPE_EMMC,
1170         SMBIOS_DEVICE_TYPE_NVME,
1171         SMBIOS_DEVICE_TYPE_UFS,
1172 } smbios_onboard_device_type;
1173
1174 #define SMBIOS_DEVICE_TYPE_COUNT 10
1175
1176 struct smbios_type41 {
1177         struct smbios_header header;
1178         u8 reference_designation;
1179         u8 device_type: 7;
1180         u8 device_status: 1;
1181         u8 device_type_instance;
1182         u16 segment_group_number;
1183         u8 bus_number;
1184         u8 function_number: 3;
1185         u8 device_number: 5;
1186         u8 eos[2];
1187 } __packed;
1188
1189
1190 #define SMBIOS_TPM_DEVICE_CHARACTERISTICS_NOT_SUPPORTED (1ULL << 2)
1191 #define SMBIOS_TPM_DEVICE_FAMILY_CONFIGURABLE_VIA_FW_UPD (1ULL << 3)
1192 #define SMBIOS_TPM_DEVICE_FAMILY_CONFIGURABLE_VIA_PLATFORM_SW_SUPPORT (1ULL << 4)
1193 #define SMBIOS_TPM_DEVICE_FAMILY_CONFIGURABLE_VIA_OEM_PROPRIETARY (1ULL << 5)
1194
1195 struct smbios_type43 {
1196         struct smbios_header header;
1197         u32 vendor_id;
1198         u8 major_spec_ver;
1199         u8 minor_spec_ver;
1200         u32 fw_ver1;
1201         u32 fw_ver2;
1202         u8 description;
1203         u64 characteristics;
1204         u32 oem_defined;
1205         u8 eos[2];
1206 } __packed;
1207
1208 struct smbios_type127 {
1209         struct smbios_header header;
1210         u8 eos[2];
1211 } __packed;
1212
1213 void smbios_fill_dimm_manufacturer_from_id(uint16_t mod_id,
1214         struct smbios_type17 *t);
1215 void smbios_fill_dimm_asset_tag(const struct dimm_info *dimm,
1216         struct smbios_type17 *t);
1217 void smbios_fill_dimm_locator(const struct dimm_info *dimm,
1218         struct smbios_type17 *t);
1219
1220 smbios_wakeup_type smbios_system_wakeup_type(void);
1221 smbios_board_type smbios_mainboard_board_type(void);
1222 smbios_enclosure_type smbios_mainboard_enclosure_type(void);
1223
1224 #endif