src/mainboard/emulation/qemu-q35/cpu.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <commonlib/helpers.h>
   4 #include <console/console.h>
   5 #include <cpu/amd/amd64_save_state.h>
   6 #include <cpu/intel/smm_reloc.h>
   7 #include <cpu/x86/legacy_save_state.h>
   8 #include <cpu/x86/mp.h>
   9 #include <cpu/x86/smm.h>
  10 #include <mainboard/emulation/qemu-i440fx/fw_cfg.h>
  11 #include <stddef.h>
  12 #include <stdint.h>
  13
  14 static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
  15               size_t *smm_save_state_size)
  16 {
  17         printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
  18
  19         smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
  20
  21         smm_open();
  22
  23         /* FIXME: on X86_64 the save state size is smaller than the size of the SMM stub */
  24         *smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
  25         printk(BIOS_DEBUG, "Save state size: 0x%zx bytes\n", *smm_save_state_size);
  26 }
  27
  28 /*
  29  * The relocation work is actually performed in SMM context, but the code
  30  * resides in the ramstage module. This occurs by trampolining from the default
  31  * SMRAM entry point to here.
  32  */
  33
  34 union __packed save_state {
  35         amd64_smm_state_save_area_t amd64;
  36         struct {
  37                 char _reserved[sizeof(amd64_smm_state_save_area_t)
  38                                - sizeof(legacy_smm_state_save_area_t)];
  39                 legacy_smm_state_save_area_t legacy;
  40         };
  41 };
  42
  43 _Static_assert(sizeof(union save_state) == sizeof(amd64_smm_state_save_area_t),
  44                "Incorrect save state union size");
  45
  46 _Static_assert(offsetof(union save_state, amd64.smm_revision)
  47                == offsetof(union save_state, legacy.smm_revision),
  48                "Incompatible SMM save state revision offset");
  49
  50 static void relocation_handler(int cpu, uintptr_t curr_smbase,
  51                                uintptr_t staggered_smbase)
  52 {
  53         union save_state *save_state =
  54                 (void *)(curr_smbase + SMM_DEFAULT_SIZE - sizeof(*save_state));
  55
  56         u32 smbase = staggered_smbase;
  57
  58         /* The SMM save state revision is always at a compatible offset */
  59         const u32 revision = save_state->legacy.smm_revision;
  60         switch (revision) {
  61         case 0x00020000:
  62                 save_state->legacy.smbase = smbase;
  63                 break;
  64         case 0x00020064:
  65                 save_state->amd64.smbase = smbase;
  66                 break;
  67         default:
  68                 printk(BIOS_ERR, "Unknown SMM revision 0x%x, not relocating SMM\n", revision);
  69                 return;
  70         };
  71
  72         printk(BIOS_DEBUG, "In relocation handler: cpu %d\n", cpu);
  73         printk(BIOS_DEBUG, "SMM revision: 0x%08x\n", revision);
  74         printk(BIOS_DEBUG, "New SMBASE=0x%08x\n", smbase);
  75 }
  76
  77 static void post_mp_init(void)
  78 {
  79         /* Limit access to SMRAM to SMM module. */
  80         smm_close();
  81
  82         /* Now that all APs have been relocated as well as the BSP let SMIs start flowing. */
  83         global_smi_enable();
  84
  85         /* Lock down the SMRAM space. */
  86         smm_lock();
  87 }
  88
  89 const struct mp_ops mp_ops_with_smm = {
  90         .get_cpu_count       = fw_cfg_max_cpus,
  91         .get_smm_info        = get_smm_info,
  92         .pre_mp_smm_init     = smm_southbridge_clear_state,
  93         .relocation_handler  = relocation_handler,
  94         .post_mp_init        = post_mp_init,
  95 };