src/southbridge/intel/i82801gx/fadt.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/pci_ops.h>
   4 #include <acpi/acpi.h>
   5 #include <cpu/x86/smm.h>
   6 #include <version.h>
   7 #include <southbridge/intel/common/pmbase.h>
   8 #include "i82801gx.h"
   9 #include "chip.h"
  10
  11 void acpi_fill_fadt(acpi_fadt_t *fadt)
  12 {
  13         struct device *dev = pcidev_on_root(0x1f, 0);
  14         struct southbridge_intel_i82801gx_config *chip = dev->chip_info;
  15         u16 pmbase = lpc_get_pmbase();
  16
  17         fadt->sci_int = 0x9;
  18
  19         if (permanent_smi_handler()) {
  20                 fadt->smi_cmd = APM_CNT;
  21                 fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
  22                 fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
  23         }
  24
  25         fadt->pm1a_evt_blk = pmbase;
  26         fadt->pm1a_cnt_blk = pmbase + PM1_CNT;
  27         fadt->pm2_cnt_blk = pmbase + PM2_CNT;
  28         fadt->pm_tmr_blk = pmbase + PM1_TMR;
  29         fadt->gpe0_blk = pmbase + GPE0_STS;
  30
  31         fadt->pm1_evt_len = 4;
  32         fadt->pm1_cnt_len = 2; /* Upper word is reserved and
  33                                   Linux complains about 32 bit. */
  34         fadt->pm2_cnt_len = 1;
  35         fadt->pm_tmr_len = 4;
  36         fadt->gpe0_blk_len = 8;
  37         fadt->p_lvl2_lat = 1;
  38         fadt->p_lvl3_lat = chip->c3_latency;
  39         fadt->duty_offset = 1;
  40         if (chip->p_cnt_throttling_supported)
  41                 fadt->duty_width = 3;
  42         else
  43                 fadt->duty_width = 0;
  44         fadt->day_alrm = 0xd;
  45         fadt->mon_alrm = 0x00;
  46         fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES;
  47         fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED
  48                        | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE
  49                        | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_C2_MP_SUPPORTED);
  50         if (chip->docking_supported)
  51                 fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;
  52
  53         fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  54         fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
  55         fadt->x_pm1a_evt_blk.bit_offset = 0;
  56         fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
  57         fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk;
  58         fadt->x_pm1a_evt_blk.addrh = 0x0;
  59
  60         fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  61         fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
  62         fadt->x_pm1a_cnt_blk.bit_offset = 0;
  63         fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
  64         fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk;
  65         fadt->x_pm1a_cnt_blk.addrh = 0x0;
  66
  67         fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  68         fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8;
  69         fadt->x_pm2_cnt_blk.bit_offset = 0;
  70         fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
  71         fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk;
  72         fadt->x_pm2_cnt_blk.addrh = 0x0;
  73
  74         fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  75         fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8;
  76         fadt->x_pm_tmr_blk.bit_offset = 0;
  77         fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
  78         fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk;
  79         fadt->x_pm_tmr_blk.addrh = 0x0;
  80
  81         fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  82         fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8;
  83         fadt->x_gpe0_blk.bit_offset = 0;
  84         fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
  85         fadt->x_gpe0_blk.addrl = fadt->gpe0_blk;
  86         fadt->x_gpe0_blk.addrh = 0x0;
  87 }