src/southbridge/intel/lynxpoint/acpi/lpc.asl

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <arch/hpet.h>
   4
   5 // Intel LPC Bus Device  - 0:1f.0
   6
   7 #include <southbridge/intel/lynxpoint/pch.h>
   8
   9 Device (LPCB)
  10 {
  11         Name (_ADR, 0x001f0000)
  12
  13         OperationRegion (LPC0, PCI_Config, 0, 0x100)
  14         Field (LPC0, AnyAcc, NoLock, Preserve)
  15         {
  16                 Offset (0x02),
  17                 PDID,   16,     // Device ID
  18                 Offset (0x40),
  19                 PMBS,   16,     // PMBASE
  20                 Offset (0x48),
  21                 GPBS,   16,     // GPIOBASE
  22                 Offset (0x60),  // Interrupt Routing Registers
  23                 PRTA,   8,
  24                 PRTB,   8,
  25                 PRTC,   8,
  26                 PRTD,   8,
  27                 Offset (0x68),
  28                 PRTE,   8,
  29                 PRTF,   8,
  30                 PRTG,   8,
  31                 PRTH,   8,
  32
  33                 Offset (0x80),  // IO Decode Ranges
  34                 IOD0,   8,
  35                 IOD1,   8,
  36         }
  37
  38         #include <southbridge/intel/common/acpi/irqlinks.asl>
  39
  40         #include "acpi/ec.asl"
  41
  42         Device (DMAC)   // DMA Controller
  43         {
  44                 Name (_HID, EISAID ("PNP0200"))
  45                 Name (_CRS, ResourceTemplate ()
  46                 {
  47                         IO (Decode16, 0x00, 0x00, 0x01, 0x20)
  48                         IO (Decode16, 0x81, 0x81, 0x01, 0x11)
  49                         IO (Decode16, 0x93, 0x93, 0x01, 0x0d)
  50                         IO (Decode16, 0xc0, 0xc0, 0x01, 0x20)
  51                         DMA (Compatibility, NotBusMaster, Transfer8_16) { 4 }
  52                 })
  53         }
  54
  55         Device (FWH)    // Firmware Hub
  56         {
  57                 Name (_HID, EISAID ("INT0800"))
  58                 Name (_CRS, ResourceTemplate ()
  59                 {
  60                         Memory32Fixed (ReadOnly, 0xff000000, 0x01000000)
  61                 })
  62         }
  63
  64         Device (HPET)
  65         {
  66                 Name (_HID, EISAID ("PNP0103"))
  67                 Name (_CID, 0x010CD041)
  68
  69                 Name (BUF0, ResourceTemplate ()
  70                 {
  71                         Memory32Fixed (ReadOnly, HPET_BASE_ADDRESS, 0x400, FED0)
  72                 })
  73
  74                 Method (_STA, 0)        // Device Status
  75                 {
  76                         Return (\HPTS(HPTE))
  77                 }
  78
  79                 Method (_CRS, 0, Serialized) // Current resources
  80                 {
  81                         If (HPTE) {
  82                                 CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
  83                                 If (HPAS == 1) {
  84                                         HPT0 = HPET_BASE_ADDRESS + 0x1000
  85                                 }
  86
  87                                 If (HPAS == 2) {
  88                                         HPT0 = HPET_BASE_ADDRESS + 0x2000
  89                                 }
  90
  91                                 If (HPAS == 3) {
  92                                         HPT0 = HPET_BASE_ADDRESS + 0x3000
  93                                 }
  94                         }
  95
  96                         Return (BUF0)
  97                 }
  98         }
  99
 100         Device (PIC)    // 8259 Interrupt Controller
 101         {
 102                 Name (_HID,EISAID ("PNP0000"))
 103                 Name (_CRS, ResourceTemplate ()
 104                 {
 105                         IO (Decode16, 0x20, 0x20, 0x01, 0x02)
 106                         IO (Decode16, 0x24, 0x24, 0x01, 0x02)
 107                         IO (Decode16, 0x28, 0x28, 0x01, 0x02)
 108                         IO (Decode16, 0x2c, 0x2c, 0x01, 0x02)
 109                         IO (Decode16, 0x30, 0x30, 0x01, 0x02)
 110                         IO (Decode16, 0x34, 0x34, 0x01, 0x02)
 111                         IO (Decode16, 0x38, 0x38, 0x01, 0x02)
 112                         IO (Decode16, 0x3c, 0x3c, 0x01, 0x02)
 113                         IO (Decode16, 0xa0, 0xa0, 0x01, 0x02)
 114                         IO (Decode16, 0xa4, 0xa4, 0x01, 0x02)
 115                         IO (Decode16, 0xa8, 0xa8, 0x01, 0x02)
 116                         IO (Decode16, 0xac, 0xac, 0x01, 0x02)
 117                         IO (Decode16, 0xb0, 0xb0, 0x01, 0x02)
 118                         IO (Decode16, 0xb4, 0xb4, 0x01, 0x02)
 119                         IO (Decode16, 0xb8, 0xb8, 0x01, 0x02)
 120                         IO (Decode16, 0xbc, 0xbc, 0x01, 0x02)
 121                         IO (Decode16, 0x4d0, 0x4d0, 0x01, 0x02)
 122                         IRQNoFlags () { 2 }
 123                 })
 124         }
 125
 126         Device (MATH)   // FPU
 127         {
 128                 Name (_HID, EISAID ("PNP0C04"))
 129                 Name (_CRS, ResourceTemplate ()
 130                 {
 131                         IO (Decode16, 0xf0, 0xf0, 0x01, 0x01)
 132                         IRQNoFlags () { 13 }
 133                 })
 134         }
 135
 136         Device (LDRC)   // LPC device: Resource consumption
 137         {
 138                 Name (_HID, EISAID ("PNP0C02"))
 139                 Name (_UID, 2)
 140
 141                 Name (RBUF, ResourceTemplate ()
 142                 {
 143                         IO (Decode16, 0x2e, 0x2e, 0x1, 0x02) // First SuperIO
 144                         IO (Decode16, 0x4e, 0x4e, 0x1, 0x02) // Second SuperIO
 145                         IO (Decode16, 0x61, 0x61, 0x1, 0x01) // NMI Status
 146                         IO (Decode16, 0x63, 0x63, 0x1, 0x01) // CPU Reserved
 147                         IO (Decode16, 0x65, 0x65, 0x1, 0x01) // CPU Reserved
 148                         IO (Decode16, 0x67, 0x67, 0x1, 0x01) // CPU Reserved
 149                         IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post
 150                         IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved
 151                         IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI
 152                         IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0xff)
 153
 154 #if !CONFIG(INTEL_LYNXPOINT_LP)
 155                         // LynxPoint-LP GPIO resources are defined in the
 156                         // SerialIO GPIO device and LynxPoint-H GPIO resources
 157                         // are defined here.
 158                         IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40)
 159 #endif
 160                 })
 161
 162                 Method (_CRS, 0, NotSerialized)
 163                 {
 164                         Return (RBUF)
 165                 }
 166         }
 167
 168         Device (RTC)    // Real Time Clock
 169         {
 170                 Name (_HID, EISAID ("PNP0B00"))
 171                 Name (_CRS, ResourceTemplate ()
 172                 {
 173                         IO (Decode16, 0x70, 0x70, 1, 8)
 174                 })
 175         }
 176
 177         Device (TIMR)   // Intel 8254 timer
 178         {
 179                 Name (_HID, EISAID ("PNP0100"))
 180                 Name (_CRS, ResourceTemplate () {
 181                         IO (Decode16, 0x40, 0x40, 0x01, 0x04)
 182                         IO (Decode16, 0x50, 0x50, 0x10, 0x04)
 183                         IRQNoFlags () {0}
 184                 })
 185         }
 186
 187 #if CONFIG(INTEL_LYNXPOINT_LP)
 188         #include "gpio.asl"
 189 #endif
 190         #include "acpi/superio.asl"
 191 }