Documentation/external_docs.md

   1 # External Resources
   2
   3 This is a list of resources that could be useful to coreboot developers.
   4 These are not endorsed or officially recommended by the coreboot project,
   5 but simply listed here in the hopes that someone will find something
   6 useful.
   7
   8 Please add any helpful or informational links and sections as you see fit.
   9
  10 ## Articles
  11
  12 * External Interrupts in the x86 system.
  13   * [Part 1: Interrupt controller evolution](https://habr.com/en/post/446312/)
  14   * [Part 2: Linux kernel boot options](https://habr.com/en/post/501660/)
  15   * [Part 3: Interrupt routing setup in a chipset](https://habr.com/en/post/501912/)
  16 * System address map initialization in x86/x64 architecture.
  17   * [Part 1: PCI-based systems](https://resources.infosecinstitute.com/topic/system-address-map-initialization-in-x86x64-architecture-part-1-pci-based-systems/)
  18   * [Part 2: PCI express-based systems](https://resources.infosecinstitute.com/topic/system-address-map-initialization-x86x64-architecture-part-2-pci-express-based-systems/)
  19   * [PCIe elastic buffer](https://www.mindshare.com/files/resources/mindshare_pcie_elastic_buffer.pdf)
  20 ```{toctree}
  21 :maxdepth: 1
  22
  23 Boot Guard and PSB have user-hostile defaults <https://mjg59.dreamwidth.org/58424.html>
  24 ```
  25
  26
  27 ## General Information
  28
  29 ```{toctree}
  30 :maxdepth: 1
  31
  32 OS Dev <https://wiki.osdev.org/Categorized_Main_Page>
  33 Interface BUS <http://www.interfacebus.com/>
  34 ```
  35
  36 ## OpenSecurityTraining2
  37
  38 OpenSecurityTraining2 is dedicated to sharing training material for any topic
  39 related to computer security, including coreboot.
  40
  41 There are various ways to learn firmware, some are more efficient than others,
  42 depending on the people. Before going straight to practice and experimenting
  43 with hardware, it can be beneficial to learn the basics of computing. OST2
  44 focuses on conveying computer architecture and security information in the form
  45 of structured instructor-led classes, available to everyone for free.
  46
  47 All material is licensed [CC BY-SA 4.0](http://creativecommons.org/licenses/by-sa/4.0/),
  48 allowing anyone to use the material however they see fit, so long as they share
  49 modified works back to the community.
  50
  51 Below is a list of currently available courses that can help understand the
  52 inner workings of coreboot and other firmware-related topics:
  53
  54 ```{toctree}
  55 :maxdepth: 1
  56
  57 coreboot design principles and boot process <https://ost2.fyi/Arch4031>
  58 x86-64 Assembly <https://ost2.fyi/Arch1001>
  59 x86-64 OS Internals <https://ost2.fyi/Arch2001>
  60 x86-64 Intel Firmware Attack & Defense <https://ost2.fyi/Arch4001>
  61 ```
  62
  63 There are [additional security courses](https://p.ost2.fyi/courses) at the site
  64 as well (such as
  65 [how to avoid writing exploitable code in C/C++](https://ost2.fyi/Vulns1001).)
  66
  67 ## Firmware Specifications & Information
  68
  69 ```{toctree}
  70 :maxdepth: 1
  71
  72 System Management BIOS - SMBIOS <https://www.dmtf.org/standards/smbios>
  73 Desktop and Mobile Architecture for System Hardware - DASH <https://www.dmtf.org/standards/dash>
  74 PNP BIOS <https://www.intel.com/content/dam/support/us/en/documents/motherboards/desktop/sb/pnpbiosspecificationv10a.pdf>
  75 ```
  76
  77
  78 ### ACPI
  79
  80 ```{toctree}
  81 :maxdepth: 1
  82
  83 ACPI Specs <https://uefi.org/acpi/specs>
  84 ACPI in Linux <https://www.kernel.org/doc/ols/2005/ols2005v1-pages-59-76.pdf>
  85 ACPI 5 Linux <https://blog.linuxplumbersconf.org/2012/wp-content/uploads/2012/09/LPC2012-ACPI5.pdf>
  86 ACPI 6 Linux <https://events.static.linuxfound.org/sites/events/files/slides/ACPI_6_and_Linux_0.pdf>
  87 ```
  88
  89
  90 ### Security
  91
  92 ```{toctree}
  93 :maxdepth: 1
  94
  95 Intel Boot Guard <https://edk2-docs.gitbook.io/understanding-the-uefi-secure-boot-chain/secure_boot_chain_in_uefi/intel_boot_guard>
  96 ```
  97
  98
  99 ## Hardware information
 100
 101 ```{toctree}
 102 :maxdepth: 1
 103
 104 WikiChip <https://en.wikichip.org/wiki/WikiChip>
 105 Sandpile <https://www.sandpile.org/>
 106 CPU-World <https://www.cpu-world.com/index.html>
 107 CPU-Upgrade <https://www.cpu-upgrade.com/index.html>
 108 ```
 109
 110
 111 ### Hardware Specifications & Standards
 112
 113 * [Bluetooth](https://www.bluetooth.com/specifications/specs/) - Bluetooth SIG
 114 ```{toctree}
 115 :maxdepth: 1
 116
 117 eMMC <https://www.jedec.org/)  - JEDEC - (LOGIN REQUIRED>
 118 ```
 119 * [eSPI](https://cdrdv2.intel.com/v1/dl/getContent/645987) - Intel
 120 * [I2c Spec](https://web.archive.org/web/20170704151406/https://www.nxp.com/docs/en/user-guide/UM10204.pdf),
 121   [Appnote](https://www.nxp.com/docs/en/application-note/AN10216.pdf) - NXP
 122 * [I2S](https://www.nxp.com/docs/en/user-manual/UM11732.pdf) - NXP
 123 ```{toctree}
 124 :maxdepth: 1
 125
 126 I3C <https://www.mipi.org/specifications/i3c-sensor-specification) - MIPI Alliance (LOGIN REQUIRED>
 127 Memory <https://www.jedec.org/)  - JEDEC - (LOGIN REQUIRED>
 128 ```
 129 * [NVMe](https://nvmexpress.org/developers/) - NVMe Specifications
 130 * [LPC](https://www.intel.com/content/dam/www/program/design/us/en/documents/low-pin-count-interface-specification.pdf) - Intel
 131 ```{toctree}
 132 :maxdepth: 1
 133
 134 PCI / PCIe / M.2 <https://pcisig.com/specifications) -  PCI-SIG - (LOGIN REQUIRED>
 135 ```
 136 * [Power Delivery](https://www.usb.org/documents) - USB Implementers Forum
 137 ```{toctree}
 138 :maxdepth: 1
 139
 140 SATA <https://sata-io.org/developers/purchase-specification) - SATA-IO (LOGIN REQUIRED>
 141 ```
 142 * [SMBus](http://www.smbus.org/specs/) - System Management Interface Forum
 143 * [Smart Battery](http://smartbattery.org/specs/) - Smart Battery System Implementers Forum
 144 * [USB](https://www.usb.org/documents) - USB Implementers Forum
 145 * [WI-FI](https://www.wi-fi.org/discover-wi-fi/specifications) - Wi-Fi Alliance
 146
 147
 148 ### Chip Vendor Documentation
 149
 150 * AMD
 151   * [Developer Guides, Manuals & ISA Documents](https://developer.amd.com/resources/developer-guides-manuals/)
 152   * [AMD Tech Docs - Official Documentation Page](https://www.amd.com/en/support/tech-docs)
 153 * ARM
 154   * [Tools and Software - Specifications](https://developer.arm.com/tools-and-software/software-development-tools/specifications)
 155 * Intel
 156   * [Developer Zone](https://www.intel.com/content/www/us/en/developer/overview.html)
 157   * [Resource & Documentation Center](https://www.intel.com/content/www/us/en/resources-documentation/developer.html)
 158   * [Architecture Software Developer Manuals](https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html)
 159   * [Intel specific ACPI](https://www.intel.com/content/www/us/en/standards/processor-vendor-specific-acpi-specification.html)
 160   * [coreboot on Eagle Stream](https://www.intel.com/content/www/us/en/content-details/778593/coreboot-practice-on-eagle-stream.html)
 161
 162 * Rockchip
 163   * [Open Source Wiki](https://opensource.rock-chips.com/wiki_Main_Page)
 164
 165
 166 ## Software
 167
 168  * [Fiedka](https://github.com/fiedka/fiedka) - A graphical Firmware Editor
 169  * [IOTools](https://github.com/adurbin/iotools) - Command line tools to access hardware registers
 170  * [UEFITool](https://github.com/LongSoft/UEFITool) - Editor for UEFI PI compliant firmware images
 171  * [CHIPSEC](https://chipsec.github.io) - Framework for analyzing platform level security & configuration
 172  * [SPDEditor](https://github.com/integralfx/SPDEditor) - GUI to edit DDR3 SPD files
 173  * [DDR4XMPEditor](https://github.com/integralfx/DDR4XMPEditor) - Editor for DDR4 SPD and XMP
 174 * [overclockSPD](https://github.com/baboomerang/overclockSPD) - Fast and easy way to read and write data to RAM SPDs.
 175 * [VBiosFinder](https://github.com/coderobe/VBiosFinder) - This tool attempts to extract a VBIOS from a BIOS update.
 176
 177
 178 ## Infrastructure software
 179
 180 ```{toctree}
 181 :maxdepth: 1
 182
 183 Kconfig <https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html>
 184 GNU Make <https://www.gnu.org/software/make/manual/>
 185 ```