soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / cpu / intel / car / p4-netburst / exit_car.S
blob1684407e81cba8536b8761c3512128a09d6b753f
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <cpu/intel/post_codes.h>
4 #include <cpu/x86/mtrr.h>
5 #include <cpu/x86/cache.h>
6 #include <cpu/x86/post_code.h>
8 .code32
9 .global chipset_teardown_car
11 chipset_teardown_car:
12         pop %esp
14         post_code(POST_POSTCAR_DISABLE_CACHE)
16         /* Disable cache. */
17         movl    %cr0, %eax
18         orl     $CR0_CacheDisable, %eax
19         movl    %eax, %cr0
21         post_code(POST_POSTCAR_DISABLE_DEF_MTRR)
23         /* Disable MTRR. */
24         movl    $MTRR_DEF_TYPE_MSR, %ecx
25         rdmsr
26         andl    $(~MTRR_DEF_TYPE_EN), %eax
27         wrmsr
29         post_code(POST_POSTCAR_TEARDOWN_DONE)
31         /* Return to caller. */
32         jmp     *%esp