soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / cpu / intel / socket_FCBGA559 / Kconfig
blobed661b6e9cb509d49388d7984f63f7f80203f375
1 config CPU_INTEL_SOCKET_FCBGA559
2         bool
3         help
4           Select this socket on Intel Pineview
6 if CPU_INTEL_SOCKET_FCBGA559
8 config SOCKET_SPECIFIC_OPTIONS
9         def_bool y
10         select CPU_INTEL_MODEL_106CX
11         select MMX
12         select CPU_HAS_L2_ENABLE_MSR
14 config DCACHE_RAM_BASE
15         hex
16         default 0xfefc0000
18 config DCACHE_RAM_SIZE
19         hex
20         default 0x8000
22 config DCACHE_BSP_STACK_SIZE
23         hex
24         default 0x2000
25         help
26           The amount of anticipated stack usage in CAR by bootblock and
27           other stages.
29 config MAX_CPUS
30         int
31         default 4
33 endif