soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / cpu / x86 / Makefile.inc
blob3ef3a90313b0f232020f3eba3bf8d71d7d05b5cf
1 subdirs-y += lapic
2 subdirs-y += mtrr
3 subdirs-y += pae
4 subdirs-$(CONFIG_HAVE_SMI_HANDLER) += smm
5 subdirs-$(CONFIG_UDELAY_TSC) += tsc
6 # Use ARCH_BOOTBLOCK_X86_64 as a proxy for knowing if 64bit is going to be used
7 subdirs-$(CONFIG_ARCH_BOOTBLOCK_X86_64) += 64bit
8 subdirs-y += cache
10 subdirs-$(CONFIG_PARALLEL_MP) += name
11 ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c
13 ramstage-y += backup_default_smm.c
14 ramstage-y += smi_trigger.c
15 smm-y += smi_trigger.c
17 subdirs-$(CONFIG_CPU_INTEL_COMMON_SMM) += ../intel/smm
19 bootblock-y += entry32.S
20 bootblock-y += entry16.S
21 bootblock-y += reset16.S
23 additional-dirs += $(obj)/cpu/x86
25 SIPI_ELF=$(obj)/cpu/x86/sipi_vector.elf
26 SIPI_RMOD=$(SIPI_ELF).rmod
27 SIPI_BIN=$(SIPI_ELF:.elf=)
28 SIPI_DOTO=$(SIPI_ELF:.elf=.o)
30 ifeq ($(CONFIG_HAVE_RAMSTAGE),y)
31 TARGET_STAGE=ramstage
32 else ifeq ($(CONFIG_RAMPAYLOAD),y)
33 TARGET_STAGE=postcar
34 else
35 $(error Halting the build due to unknown TARGET_STAGE select)
36 endif
38 ifeq ($(CONFIG_PARALLEL_MP),y)
39 $(TARGET_STAGE)-srcs += $(SIPI_BIN).manual
40 endif
41 rmodules_$(ARCH-$(TARGET_STAGE)-y)-$(CONFIG_PARALLEL_MP) += sipi_vector.S
43 $(SIPI_DOTO): $(call src-to-obj,rmodules_$(ARCH-$(TARGET_STAGE)-y),src/cpu/x86/sipi_vector.S)
44         $(LD_rmodules_$(ARCH-$(TARGET_STAGE)-y)) -nostdlib -r -o $@ $^
46 $(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_DOTO), 0,$(ARCH-$(TARGET_STAGE)-y)))
48 $(SIPI_BIN): $(SIPI_RMOD)
49         $(OBJCOPY_$(TARGET_STAGE)) -O binary $< $@
51 $(call src-to-obj,$(TARGET_STAGE),$(SIPI_BIN).manual): $(SIPI_BIN)
52         @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
53         cd $(dir $<); $(OBJCOPY_rmodules_$(ARCH-$(TARGET_STAGE)-y)) -I binary $(notdir $<) $(target-objcopy) $(abspath $@)