soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / device / pci_rom.c
bloba454c9e0ae0242abf77b37e0f7217e2dcb274077
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <commonlib/endian.h>
5 #include <device/device.h>
6 #include <device/pci.h>
7 #include <device/pci_ids.h>
8 #include <device/pci_ops.h>
9 #include <stdio.h>
10 #include <string.h>
11 #include <cbfs.h>
12 #include <cbmem.h>
13 #include <acpi/acpigen.h>
15 /* Rmodules don't like weak symbols. */
16 void __weak map_oprom_vendev_rev(u32 *vendev, u8 *rev) { return; }
17 u32 __weak map_oprom_vendev(u32 vendev) { return vendev; }
19 void vga_oprom_preload(void)
21 /* The CONFIG_VGA_BIOS_ID symbol is only defined when VGA_BIOS is selected */
22 #if CONFIG(VGA_BIOS)
23 const char name[] = "pci" CONFIG_VGA_BIOS_ID ".rom";
25 if (!CONFIG(CBFS_PRELOAD))
26 return;
28 printk(BIOS_DEBUG, "Preloading VGA ROM %s\n", name);
30 cbfs_preload(name);
31 #endif
34 static void *cbfs_boot_map_optionrom(uint16_t vendor, uint16_t device)
36 char name[17] = "pciXXXX,XXXX.rom";
38 snprintf(name, sizeof(name), "pci%04hx,%04hx.rom", vendor, device);
40 return cbfs_map(name, NULL);
43 static void *cbfs_boot_map_optionrom_revision(uint16_t vendor, uint16_t device, uint8_t rev)
45 char name[20] = "pciXXXX,XXXX,XX.rom";
47 snprintf(name, sizeof(name), "pci%04hx,%04hx,%02hhx.rom", vendor, device, rev);
49 return cbfs_map(name, NULL);
52 struct rom_header *pci_rom_probe(const struct device *dev)
54 struct rom_header *rom_header = NULL;
55 struct pci_data *rom_data;
56 u8 rev = pci_read_config8(dev, PCI_REVISION_ID);
57 u8 mapped_rev = rev;
58 u32 vendev = (dev->vendor << 16) | dev->device;
59 u32 mapped_vendev = vendev;
61 /* If the ROM is in flash, then don't check the PCI device for it. */
62 if (CONFIG(CHECK_REV_IN_OPROM_NAME)) {
63 map_oprom_vendev_rev(&mapped_vendev, &mapped_rev);
64 rom_header = cbfs_boot_map_optionrom_revision(mapped_vendev >> 16,
65 mapped_vendev & 0xffff,
66 mapped_rev);
67 } else {
68 mapped_vendev = map_oprom_vendev(vendev);
69 rom_header = cbfs_boot_map_optionrom(mapped_vendev >> 16,
70 mapped_vendev & 0xffff);
73 if (rom_header) {
74 printk(BIOS_DEBUG, "In CBFS, ROM address for %s = %p\n",
75 dev_path(dev), rom_header);
76 } else if (CONFIG(ON_DEVICE_ROM_LOAD)) {
77 uintptr_t rom_address;
79 rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);
81 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
82 if (CONFIG(CPU_QEMU_X86) && (dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
83 rom_address = 0xc0000;
84 else
85 return NULL;
86 } else {
87 /* Enable expansion ROM address decoding. */
88 pci_write_config32(dev, PCI_ROM_ADDRESS,
89 rom_address|PCI_ROM_ADDRESS_ENABLE);
92 rom_address &= PCI_ROM_ADDRESS_MASK;
94 printk(BIOS_DEBUG, "Option ROM address for %s = %lx\n",
95 dev_path(dev), (unsigned long)rom_address);
96 rom_header = (struct rom_header *)rom_address;
97 } else {
98 printk(BIOS_DEBUG, "PCI Option ROM loading disabled for %s\n",
99 dev_path(dev));
100 return NULL;
103 printk(BIOS_SPEW,
104 "PCI expansion ROM, signature 0x%04x, INIT size 0x%04x, data ptr 0x%04x\n",
105 le32_to_cpu(rom_header->signature),
106 rom_header->size * 512, le32_to_cpu(rom_header->data));
108 if (le32_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
109 printk(BIOS_ERR, "Incorrect expansion ROM header signature %04x\n",
110 le32_to_cpu(rom_header->signature));
111 return NULL;
114 rom_data = (((void *)rom_header) + le32_to_cpu(rom_header->data));
116 printk(BIOS_SPEW, "PCI ROM image, vendor ID %04x, device ID %04x,\n",
117 rom_data->vendor, rom_data->device);
118 /* If the device id is mapped, a mismatch is expected */
119 if ((dev->vendor != rom_data->vendor
120 || dev->device != rom_data->device)
121 && (vendev == mapped_vendev)) {
122 printk(BIOS_ERR, "ID mismatch: vendor ID %04x, device ID %04x\n",
123 dev->vendor, dev->device);
124 return NULL;
127 printk(BIOS_SPEW, "PCI ROM image, Class Code %04x%02x, Code Type %02x\n",
128 rom_data->class_hi, rom_data->class_lo,
129 rom_data->type);
131 if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
132 printk(BIOS_DEBUG, "Class Code mismatch ROM %08x, dev %08x\n",
133 (rom_data->class_hi << 8) | rom_data->class_lo,
134 dev->class);
135 // return NULL;
138 return rom_header;
141 static void *pci_ram_image_start = (void *)PCI_RAM_IMAGE_START;
143 struct rom_header *pci_rom_load(struct device *dev,
144 struct rom_header *rom_header)
146 struct pci_data * rom_data;
147 unsigned int rom_size;
148 unsigned int image_size=0;
150 do {
151 /* Get next image. */
152 rom_header = (struct rom_header *)((void *)rom_header
153 + image_size);
155 rom_data = (struct pci_data *)((void *)rom_header
156 + le32_to_cpu(rom_header->data));
158 image_size = le32_to_cpu(rom_data->ilen) * 512;
159 } while ((rom_data->type != 0) && (rom_data->indicator != 0)); // make sure we got x86 version
161 if (rom_data->type != 0)
162 return NULL;
164 rom_size = rom_header->size * 512;
167 * We check to see if the device thinks it is a VGA device not
168 * whether the ROM image is for a VGA device because some
169 * devices have a mismatch between the hardware and the ROM.
171 if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
172 #if !CONFIG(MULTIPLE_VGA_ADAPTERS)
173 extern struct device *vga_pri; /* Primary VGA device (device.c). */
174 if (dev != vga_pri) return NULL; /* Only one VGA supported. */
175 #endif
176 if ((void *)PCI_VGA_RAM_IMAGE_START != rom_header) {
177 printk(BIOS_DEBUG,
178 "Copying VGA ROM Image from %p to 0x%x, 0x%x bytes\n",
179 rom_header, PCI_VGA_RAM_IMAGE_START, rom_size);
180 memcpy((void *)PCI_VGA_RAM_IMAGE_START, rom_header,
181 rom_size);
183 return (struct rom_header *)(PCI_VGA_RAM_IMAGE_START);
186 printk(BIOS_DEBUG, "Copying non-VGA ROM image from %p to %p, 0x%x bytes\n",
187 rom_header, pci_ram_image_start, rom_size);
189 memcpy(pci_ram_image_start, rom_header, rom_size);
190 pci_ram_image_start += rom_size;
191 return (struct rom_header *)(pci_ram_image_start-rom_size);
194 /* ACPI */
195 #if CONFIG(HAVE_ACPI_TABLES)
197 /* VBIOS may be modified after oprom init so use the copy if present. */
198 static struct rom_header *check_initialized(const struct device *dev)
200 struct rom_header *run_rom;
201 struct pci_data *rom_data;
203 if (!CONFIG(VGA_ROM_RUN) && !CONFIG(RUN_FSP_GOP))
204 return NULL;
206 run_rom = (struct rom_header *)(uintptr_t)PCI_VGA_RAM_IMAGE_START;
207 if (read_le16(&run_rom->signature) != PCI_ROM_HDR)
208 return NULL;
210 rom_data = (struct pci_data *)((u8 *)run_rom
211 + read_le16(&run_rom->data));
213 if (read_le32(&rom_data->signature) == PCI_DATA_HDR
214 && read_le16(&rom_data->device) == dev->device
215 && read_le16(&rom_data->vendor) == dev->vendor)
216 return run_rom;
217 else
218 return NULL;
221 static unsigned long
222 pci_rom_acpi_fill_vfct(const struct device *device, acpi_vfct_t *vfct_struct,
223 unsigned long current)
225 acpi_vfct_image_hdr_t *header = &vfct_struct->image_hdr;
226 struct rom_header *rom;
228 rom = check_initialized(device);
229 if (!rom)
230 rom = pci_rom_probe(device);
231 if (!rom) {
232 printk(BIOS_ERR, "%s failed\n", __func__);
233 return current;
236 printk(BIOS_DEBUG, " Copying %sVBIOS image from %p\n",
237 rom == (struct rom_header *)
238 (uintptr_t)PCI_VGA_RAM_IMAGE_START ?
239 "initialized " : "",
240 rom);
242 header->DeviceID = device->device;
243 header->VendorID = device->vendor;
244 header->PCIBus = device->bus->secondary;
245 header->PCIFunction = PCI_FUNC(device->path.pci.devfn);
246 header->PCIDevice = PCI_SLOT(device->path.pci.devfn);
247 header->ImageLength = rom->size * 512;
248 memcpy((void *)&header->VbiosContent, rom, header->ImageLength);
250 vfct_struct->VBIOSImageOffset = (size_t)header - (size_t)vfct_struct;
252 current += header->ImageLength;
253 return current;
256 unsigned long
257 pci_rom_write_acpi_tables(const struct device *device, unsigned long current,
258 struct acpi_rsdp *rsdp)
260 /* Only handle VGA devices */
261 if ((device->class >> 8) != PCI_CLASS_DISPLAY_VGA)
262 return current;
264 /* Only handle enabled devices */
265 if (!device->enabled)
266 return current;
268 /* AMD/ATI uses VFCT */
269 if (device->vendor == PCI_VID_ATI) {
270 acpi_vfct_t *vfct;
272 current = ALIGN_UP(current, 8);
273 vfct = (acpi_vfct_t *)current;
274 acpi_create_vfct(device, vfct, pci_rom_acpi_fill_vfct);
275 if (vfct->header.length) {
276 printk(BIOS_DEBUG, "ACPI: * VFCT at %lx\n", current);
277 current += vfct->header.length;
278 acpi_add_table(rsdp, vfct);
282 return current;
285 void pci_rom_ssdt(const struct device *device)
287 static size_t ngfx;
289 /* Only handle display devices */
290 if ((device->class >> 16) != PCI_BASE_CLASS_DISPLAY)
291 return;
293 /* Only handle enabled devices */
294 if (!device->enabled)
295 return;
297 /* Probe for option rom */
298 const struct rom_header *rom = pci_rom_probe(device);
299 if (!rom || !rom->size) {
300 printk(BIOS_WARNING, "%s: Missing PCI Option ROM\n",
301 dev_path(device));
302 return;
305 const char *scope = acpi_device_path(device);
306 if (!scope) {
307 printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
308 return;
311 /* Supports up to four devices. */
312 if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) {
313 printk(BIOS_ERR, "%s: Out of CBMEM IDs.\n", dev_path(device));
314 return;
317 /* Prepare memory */
318 const size_t cbrom_length = rom->size * 512;
319 if (!cbrom_length) {
320 printk(BIOS_ERR, "%s: ROM has zero length!\n",
321 dev_path(device));
322 return;
325 void *cbrom = cbmem_add(CBMEM_ID_ROM0 + ngfx, cbrom_length);
326 if (!cbrom) {
327 printk(BIOS_ERR, "%s: Failed to allocate CBMEM.\n",
328 dev_path(device));
329 return;
331 /* Increment CBMEM id for next device */
332 ngfx++;
334 memcpy(cbrom, rom, cbrom_length);
336 /* write _ROM method */
337 acpigen_write_scope(scope);
338 acpigen_write_rom(cbrom, cbrom_length);
339 acpigen_pop_len(); /* pop scope */
341 #endif