soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / drivers / aspeed / common / aspeed_coreboot.h
blob3f740b21c4f425d5a9833d36b5b8a24399f6e2cd
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #ifndef _ASPEED_COREBOOT_
4 #define _ASPEED_COREBOOT_
6 #include <delay.h>
7 #include <stdlib.h>
8 #include <stdint.h>
9 #include <string.h>
10 #include <arch/io.h>
11 #include <device/mmio.h>
13 #include <console/console.h>
14 #include <device/device.h>
15 #include <device/pci.h>
16 #include <device/pci_ops.h>
18 /* coreboot <--> kernel code interface */
19 #define __iomem
20 typedef u64 phys_addr_t;
21 #define pci_dev device
23 #define SZ_16M 0x01000000
25 #define min_t(type, x, y) ({ \
26 type __min1 = (x); \
27 type __min2 = (y); \
28 __min1 < __min2 ? __min1 : __min2; })
30 #define dev_info(dev, format, arg...) printk(BIOS_INFO, "%s: " format, __func__, ##arg)
31 #define dev_dbg(dev, format, arg...) printk(BIOS_DEBUG, "%s: " format, __func__, ##arg)
32 #define dev_err(dev, format, arg...) printk(BIOS_ERR, "%s: " format, __func__, ##arg)
34 #define pr_info(format, arg...) printk(BIOS_INFO, "%s: " format, __func__, ##arg)
35 #define pr_debug(format, arg...) printk(BIOS_INFO, "%s: " format, __func__, ##arg)
36 #define pr_err(format, arg...) printk(BIOS_ERR, "%s: " format, __func__, ##arg)
38 #define DRM_INFO pr_info
40 #define GFP_KERNEL 0
41 #define GFP_ATOMIC 1
42 #define kfree(address) free(address)
44 #define EIO 5
45 #define ENOMEM 12
47 struct firmware {
48 size_t size;
49 const u8 *data;
50 struct page **pages;
52 /* firmware loader private fields */
53 void *priv;
56 struct drm_device {
57 struct pci_dev *pdev;
58 void *dev_private;
61 static inline void *kzalloc(size_t size, int flags) {
62 void *ptr = malloc(size);
63 memset(ptr, 0, size);
64 return ptr;
67 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
68 u32 *val)
70 *val = pci_read_config32(dev, where);
71 return 0;
74 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
75 u32 val)
77 pci_write_config32(dev, where, val);
78 return 0;
81 static inline int pci_read_config_byte(struct pci_dev *dev, int where,
82 u8 *val)
84 *val = pci_read_config8(dev, where);
85 return 0;
88 static inline struct resource* resource_at_bar(struct pci_dev *dev, u8 bar) {
89 struct resource *res = dev->resource_list;
90 int i;
91 for (i = 0; i < bar; i++) {
92 res = res->next;
93 if (res == NULL)
94 return NULL;
97 return res;
100 static inline resource_t pci_resource_len(struct pci_dev *dev, u8 bar) {
101 struct resource *res = resource_at_bar(dev, bar);
102 if (res)
103 return res->size;
104 else
105 return 0;
108 static inline resource_t pci_resource_start(struct pci_dev *dev, u8 bar) {
109 struct resource *res = resource_at_bar(dev, bar);
110 if (res)
111 return res->base;
112 else
113 return 0;
116 static inline unsigned int ioread32(void __iomem *p) {
117 return read32(p);
120 static inline void iowrite32(u32 val, void __iomem *p) {
121 write32(p, val);
124 static inline unsigned int ioread16(void __iomem *p) {
125 return read16(p);
128 static inline void iowrite16(u16 val, void __iomem *p) {
129 write16(p, val);
132 static inline unsigned int ioread8(void __iomem *p) {
133 return read8(p);
136 static inline void iowrite8(u8 val, void __iomem *p) {
137 write8(p, val);
140 static inline unsigned int ioread_cbio32(void __iomem *p) {
141 return inl((uint16_t)((intptr_t)p));
144 static inline void iowrite_cbio32(u32 val, void __iomem *p) {
145 outl(val, (uint16_t)((intptr_t)p));
148 static inline unsigned int ioread_cbio16(void __iomem *p) {
149 return inw((uint16_t)((intptr_t)p));
152 static inline void iowrite_cbio16(u16 val, void __iomem *p) {
153 outw(val, (uint16_t)((intptr_t)p));
156 static inline unsigned int ioread_cbio8(void __iomem *p) {
157 return inb((uint16_t)((intptr_t)p));
160 static inline void iowrite_cbio8(u8 val, void __iomem *p) {
161 outb(val, (uint16_t)((intptr_t)p));
164 static inline void msleep(unsigned int msecs) {
165 udelay(msecs * 1000);
168 #endif