soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / drivers / aspeed / common / ast_i2c.c
blobb4ee0180b2b184b1cea8d7f539712826b6e8a670
1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copied from Linux drivers/gpu/drm/ast/ast_mode.c
4 */
5 #include <delay.h>
6 #include <device/i2c_simple.h>
8 #include "ast_drv.h"
10 static struct ast_private *ast;
12 #define _GET_INDEX_REG(x) ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, (x))
13 #define ASPEED_BUS 0
15 static int get_clock(unsigned int bus)
17 uint32_t val, val2, count, pass;
19 count = 0;
20 pass = 0;
21 val = (_GET_INDEX_REG(0x10) >> 4) & 0x01;
22 do {
23 val2 = (_GET_INDEX_REG(0x10) >> 4) & 0x01;
24 if (val == val2) {
25 pass++;
26 } else {
27 pass = 0;
28 val = (_GET_INDEX_REG(0x10) >> 4) & 0x01;
30 } while ((pass < 5) && (count++ < 0x10000));
32 return val & 1 ? 1 : 0;
35 static int get_data(unsigned int bus)
37 uint32_t val, val2, count, pass;
39 count = 0;
40 pass = 0;
41 val = (_GET_INDEX_REG(0x20) >> 5) & 0x01;
42 do {
43 val2 = (_GET_INDEX_REG(0x20) >> 5) & 0x01;
44 if (val == val2) {
45 pass++;
46 } else {
47 pass = 0;
48 val = (_GET_INDEX_REG(0x20) >> 5) & 0x01;
50 } while ((pass < 5) && (count++ < 0x10000));
52 return val & 1 ? 1 : 0;
55 static void set_clock(unsigned int bus, int clock)
57 int i;
58 u8 ujcrb7, jtemp;
60 for (i = 0; i < 0x10000; i++) {
61 ujcrb7 = ((clock & 0x01) ? 0 : 1);
62 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4, ujcrb7);
63 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
64 if (ujcrb7 == jtemp)
65 break;
69 static void set_data(unsigned int bus, int data)
71 int i;
72 u8 ujcrb7, jtemp;
74 for (i = 0; i < 0x10000; i++) {
75 ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
76 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1, ujcrb7);
77 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
78 if (ujcrb7 == jtemp)
79 break;
83 static struct software_i2c_ops ast_ops = {
84 .set_sda = set_data,
85 .set_scl = set_clock,
86 .get_sda = get_data,
87 .get_scl = get_clock,
90 int ast_software_i2c_read(struct ast_private *ast_priv, uint8_t edid[128])
92 struct software_i2c_ops *backup;
93 int ret;
95 backup = software_i2c[ASPEED_BUS];
97 software_i2c[ASPEED_BUS] = &ast_ops;
99 ast = ast_priv;
101 /* Ast POST pulled SDA and SCL low, recover the bus to a known state */
102 set_clock(ASPEED_BUS, 1);
103 set_data(ASPEED_BUS, 1);
105 udelay(100);
107 /* Need to reset internal EEPROM counter to 0 */
108 ret = i2c_read_bytes(ASPEED_BUS, 0x50, 0, edid, 128);
110 software_i2c[ASPEED_BUS] = backup;
112 return ret;