soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / drivers / generic / bayhub / chip.h
blob77b751214305e13aa3a1fa1f6ce01d677100e1fa
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi_device.h>
5 /*
6 * Bayhub BG720 PCI to eMMC bridge
7 */
8 struct drivers_generic_bayhub_config {
9 /* 1 to enable power-saving mode, 0 to disable */
10 int power_saving;
12 /* When set, disables programming HS200 mode */
13 bool disable_hs200_mode;
15 /* CLK and DAT tuning values */
16 uint8_t vih_tuning_value;