soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / drivers / intel / fsp2_0 / include / fsp / upd.h
blob827c95d980fad6baccbccbdf3f94d7131713a5fc
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #ifndef _FSP2_0_UPD_H_
4 #define _FSP2_0_UPD_H_
6 #include <stdint.h>
8 struct FSP_UPD_HEADER {
9 ///
10 /// UPD Region Signature. This signature will be
11 /// "XXXXXX_T" for FSP-T
12 /// "XXXXXX_M" for FSP-M
13 /// "XXXXXX_S" for FSP-S
14 /// Where XXXXXX is an unique signature
15 ///
16 uint64_t Signature;
17 ///
18 /// Revision of the Data structure. For FSP v2.0 value is 1.
19 ///
20 uint8_t Revision;
21 uint8_t Reserved[23];
22 } __packed;
24 #if CONFIG(PLATFORM_USES_FSP2_X86_32)
25 struct FSPM_ARCH_UPD {
26 ///
27 /// Revision of the structure. For FSP v2.0 value is 1.
28 ///
29 uint8_t Revision;
30 uint8_t Reserved[3];
31 ///
32 /// Pointer to the non-volatile storage (NVS) data buffer.
33 /// If it is NULL it indicates the NVS data is not available.
34 ///
35 uint32_t NvsBufferPtr;
36 ///
37 /// Pointer to the temporary stack base address to be
38 /// consumed inside FspMemoryInit() API.
39 ///
40 uint32_t StackBase;
41 ///
42 /// Temporary stack size to be consumed inside
43 /// FspMemoryInit() API.
44 ///
45 uint32_t StackSize;
46 ///
47 /// Size of memory to be reserved by FSP below "top
48 /// of low usable memory" for bootloader usage.
49 ///
50 uint32_t BootLoaderTolumSize;
51 ///
52 /// Current boot mode.
53 ///
54 uint32_t BootMode;
55 uint8_t Reserved1[8];
56 } __packed;
57 #else
58 #error You need to implement this struct for x86_64 FSP
59 #endif
61 #endif
62 struct FSPS_ARCH_UPD {
63 ///
64 /// Revision of the structure. For FSP v2.2 value is 1.
65 ///
66 uint8_t Revision;
67 uint8_t Reserved[3];
68 ///
69 /// Length of the structure in bytes. The current value for this field is 32
70 ///
71 uint32_t Length;
72 uint8_t Reserved1[4];
73 ///
74 /// To enable multi-phase silicon initialization the bootloader must set non-zero value
75 ///
76 uint8_t EnableMultiPhaseSiliconInit;
77 uint8_t Reserved2[19];
78 } __packed;
80 #endif /* _FSP2_0_UPD_H_ */