1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 struct FSP_UPD_HEADER
{
10 /// UPD Region Signature. This signature will be
11 /// "XXXXXX_T" for FSP-T
12 /// "XXXXXX_M" for FSP-M
13 /// "XXXXXX_S" for FSP-S
14 /// Where XXXXXX is an unique signature
18 /// Revision of the Data structure. For FSP v2.0 value is 1.
24 #if CONFIG(PLATFORM_USES_FSP2_X86_32)
25 struct FSPM_ARCH_UPD
{
27 /// Revision of the structure. For FSP v2.0 value is 1.
32 /// Pointer to the non-volatile storage (NVS) data buffer.
33 /// If it is NULL it indicates the NVS data is not available.
35 uint32_t NvsBufferPtr
;
37 /// Pointer to the temporary stack base address to be
38 /// consumed inside FspMemoryInit() API.
42 /// Temporary stack size to be consumed inside
43 /// FspMemoryInit() API.
47 /// Size of memory to be reserved by FSP below "top
48 /// of low usable memory" for bootloader usage.
50 uint32_t BootLoaderTolumSize
;
52 /// Current boot mode.
58 #error You need to implement this struct for x86_64 FSP
62 struct FSPS_ARCH_UPD
{
64 /// Revision of the structure. For FSP v2.2 value is 1.
69 /// Length of the structure in bytes. The current value for this field is 32
74 /// To enable multi-phase silicon initialization the bootloader must set non-zero value
76 uint8_t EnableMultiPhaseSiliconInit
;
77 uint8_t Reserved2
[19];
80 #endif /* _FSP2_0_UPD_H_ */