soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / drivers / intel / fsp2_0 / include / fsp / util.h
blob80982f0e57433f5d2b765845a9bd80d9c9a58ec8
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #ifndef _FSP2_0_UTIL_H_
4 #define _FSP2_0_UTIL_H_
6 #include <boot/coreboot_tables.h>
7 #include <cbfs.h>
8 #include <commonlib/region.h>
9 #include <cpu/cpu.h>
10 #include <fsp/api.h>
11 #include <efi/efi_datatype.h>
12 #include <fsp/info_header.h>
13 #include <memrange.h>
14 #include <program_loading.h>
15 #include <types.h>
17 #define FSP_VER_LEN 30
19 /* Macro for checking and loading array type configs into array type UPDs */
20 #define FSP_ARRAY_LOAD(dst, src) \
21 do { \
22 _Static_assert(ARRAY_SIZE(dst) >= ARRAY_SIZE(src), "copy buffer overflow!"); \
23 memcpy(dst, src, sizeof(src)); \
24 } while (0)
26 struct hob_header {
27 uint16_t type;
28 uint16_t length;
29 } __packed;
31 struct fsp_nvs_hob2_data_region_header {
32 efi_physical_address nvs_data_ptr;
33 uint64_t nvs_data_length;
36 struct fsp_notify_params {
37 enum fsp_notify_phase phase;
40 enum fsp_multi_phase_action {
41 GET_NUMBER_OF_PHASES = 0,
42 EXECUTE_PHASE = 1
45 struct fsp_multi_phase_params {
46 enum fsp_multi_phase_action multi_phase_action;
47 uint32_t phase_index;
48 void *multi_phase_param_ptr;
51 struct hob_resource {
52 uint8_t owner_guid[16];
53 uint32_t type;
54 uint32_t attribute_type;
55 uint64_t addr;
56 uint64_t length;
57 } __packed;
59 union fsp_revision {
60 uint32_t val;
61 struct {
62 uint8_t bld_num;
63 uint8_t revision;
64 uint8_t minor;
65 uint8_t major;
66 } rev;
69 union extended_fsp_revision {
70 uint16_t val;
71 struct {
72 uint8_t bld_num;
73 uint8_t revision;
74 } rev;
77 #if CONFIG_UDK_VERSION < CONFIG_UDK_2017_VERSION
78 enum resource_type {
79 EFI_RESOURCE_SYSTEM_MEMORY = 0,
80 EFI_RESOURCE_MEMORY_MAPPED_IO = 1,
81 EFI_RESOURCE_IO = 2,
82 EFI_RESOURCE_FIRMWARE_DEVICE = 3,
83 EFI_RESOURCE_MEMORY_MAPPED_IO_PORT = 4,
84 EFI_RESOURCE_MEMORY_RESERVED = 5,
85 EFI_RESOURCE_IO_RESERVED = 6,
86 EFI_RESOURCE_MAX_MEMORY_TYPE = 7,
88 #endif
90 enum hob_type {
91 HOB_TYPE_HANDOFF = 0x0001,
92 HOB_TYPE_MEMORY_ALLOCATION = 0x0002,
93 HOB_TYPE_RESOURCE_DESCRIPTOR = 0x0003,
94 HOB_TYPE_GUID_EXTENSION = 0x0004,
95 HOB_TYPE_FV = 0x0005,
96 HOB_TYPE_CPU = 0x0006,
97 HOB_TYPE_MEMORY_POOL = 0x0007,
98 HOB_TYPE_FV2 = 0x0009,
99 HOB_TYPE_LOAD_PEIM_UNUSED = 0x000A,
100 HOB_TYPE_UCAPSULE = 0x000B,
101 HOB_TYPE_UNUSED = 0xFFFE,
102 HOB_TYPE_END_OF_HOB_LIST = 0xFFFF,
105 extern const uint8_t fsp_bootloader_tolum_guid[16];
106 extern const uint8_t fsp_nv_storage_guid[16];
107 extern const uint8_t fsp_reserved_memory_guid[16];
110 * Functions to iterate over the HOBs and get resource structs or extension HOB data. It's
111 * required to initialize the hob_iterator struct by a fsp_hob_iterator_init call before
112 * passing the fsp_hob_iterator_get_next_* functions. The fsp_hob_iterator_get_next_* functions
113 * will update the hob_iterator to point to the next HOB header, so the iterators can be called
114 * multiple times to get the data from multiple HOB instances.
116 enum cb_err fsp_hob_iterator_init(const struct hob_header **hob_iterator);
117 enum cb_err fsp_hob_iterator_get_next_resource(const struct hob_header **hob_iterator,
118 const struct hob_resource **res);
119 enum cb_err fsp_hob_iterator_get_next_guid_resource(const struct hob_header **hob_iterator,
120 const uint8_t guid[16],
121 const struct hob_resource **res);
122 enum cb_err fsp_hob_iterator_get_next_guid_extension(const struct hob_header **hob_iterator,
123 const uint8_t guid[16],
124 const void **data, size_t *size);
126 /* Function to extract the FSP timestamp from FPDT Hob and display */
127 void fsp_display_timestamp(void);
128 const void *fsp_get_hob_list(void);
129 void *fsp_get_hob_list_ptr(void);
130 const void *fsp_find_extension_hob_by_guid(const uint8_t *guid, size_t *size);
131 const void *fsp_find_nv_storage_data(size_t *size);
132 enum cb_err fsp_find_range_hob(struct range_entry *re, const uint8_t guid[16]);
133 void fsp_display_fvi_version_hob(void);
134 void fsp_find_reserved_memory(struct range_entry *re);
135 const struct hob_resource *fsp_hob_header_to_resource(
136 const struct hob_header *hob);
137 const struct hob_header *fsp_next_hob(const struct hob_header *parent);
138 bool fsp_guid_compare(const uint8_t guid1[16], const uint8_t guid2[16]);
139 void fsp_find_bootloader_tolum(struct range_entry *re);
140 bool fsp_display_error_info(void);
141 void display_fsp_error_info_hob(const void *hob);
142 void fsp_get_version(char *buf);
143 /* fsp_verify_upd_header_signature calls die() on signature mismatch */
144 void fsp_verify_upd_header_signature(uint64_t upd_signature, uint64_t expected_signature);
145 void lb_string_platform_blob_version(struct lb_header *header);
146 void report_fspt_output(void);
147 void soc_validate_fspm_header(const struct fsp_header *hdr);
149 * This function finds the FSP resource HOB for the given GUID.
150 * Returns the pointer to the HOB if found, otherwise NULL
152 const void *fsp_find_resource_hob_by_guid(const uint8_t *guid);
154 /* Fill in header and validate a loaded FSP component. */
155 enum cb_err fsp_validate_component(struct fsp_header *hdr, void *fsp_blob, size_t size);
157 struct fsp_load_descriptor {
158 /* fsp_prog object will have region_device initialized to final
159 * load location in memory. */
160 struct prog fsp_prog;
161 /* CBFS allocator to place loaded FSP. NULL to map flash directly. */
162 cbfs_allocator_t alloc;
163 /* Optional argument to be utilized by get_destination() callback. */
164 void *arg;
167 /* Load the FSP component described by fsp_load_descriptor from cbfs. The FSP
168 * header object will be validated and filled in on successful load. */
169 enum cb_err fsp_load_component(struct fsp_load_descriptor *fspld, struct fsp_header *hdr);
172 * Handle FSP reboot request status. Chipset/soc is expected to provide
173 * chipset_handle_reset() that deals with reset type codes specific to given
174 * SoC. If the requested status is not a reboot status or unhandled, this
175 * function does nothing.
177 void fsp_handle_reset(uint32_t status);
179 /* SoC/chipset must provide this to handle platform-specific reset codes */
180 void chipset_handle_reset(uint32_t status);
182 typedef asmlinkage uint32_t (*temp_ram_exit_fn)(void *param);
183 typedef asmlinkage uint32_t (*fsp_memory_init_fn)
184 (void *raminit_upd, void **hob_list);
185 typedef asmlinkage uint32_t (*fsp_silicon_init_fn)(void *silicon_upd);
186 typedef asmlinkage uint32_t (*fsp_multi_phase_si_init_fn)(struct fsp_multi_phase_params *);
187 typedef asmlinkage uint32_t (*fsp_notify_fn)(struct fsp_notify_params *);
188 #include <fsp/debug.h>
190 #endif /* _FSP2_0_UTIL_H_ */