soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / drivers / parade / ps8640 / ps8640.h
blobfb78be6bd7cb9661b9abd440bfb9aa672a4e7315
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <edid.h>
4 #include <types.h>
6 #ifndef _PS8640_H_
7 #define _PS8640_H_
9 enum {
10 PAGE2_GPIO_L = 0xa6,
11 PAGE2_GPIO_H = 0xa7,
12 PAGE2_I2C_BYPASS = 0xea,
13 PS_GPIO9 = BIT(1),
14 I2C_BYPASS_EN = BIT(7),
16 PAGE2_MCS_EN = 0xf3,
17 MCS_EN_SHIFT = 0,
18 MCS_EN_MASK = 0x1,
19 PAGE3_SET_ADD = 0xfe,
20 PAGE3_SET_VAL = 0xff,
21 VDO_CTL_ADD = 0x13,
22 VDO_DIS = 0x18,
23 VDO_EN = 0x1c,
26 enum {
27 PAGE0_AUXCH_CFG3 = 0x76,
28 AUXCH_CFG3_RESET = 0xff,
29 PAGE0_SWAUX_ADDR_7_0 = 0x7d,
30 PAGE0_SWAUX_ADDR_15_8 = 0x7e,
31 PAGE0_SWAUX_ADDR_23_16 = 0x7f,
32 SWAUX_ADDR_MASK = 0xfffff,
33 PAGE0_SWAUX_LENGTH = 0x80,
34 SWAUX_LENGTH_MASK = 0xf,
35 SWAUX_NO_PAYLOAD = BIT(7),
36 PAGE0_SWAUX_WDATA = 0x81,
37 PAGE0_SWAUX_RDATA = 0x82,
38 PAGE0_SWAUX_CTRL = 0x83,
39 SWAUX_SEND = BIT(0),
40 PAGE0_SWAUX_STATUS = 0x84,
41 SWAUX_M_MASK = 0x1f,
42 SWAUX_STATUS_MASK = (0x7 << 5),
43 SWAUX_STATUS_NACK = (0x1 << 5),
44 SWAUX_STATUS_DEFER = (0x2 << 5),
45 SWAUX_STATUS_ACKM = (0x3 << 5),
46 SWAUX_STATUS_INVALID = (0x4 << 5),
47 SWAUX_STATUS_I2C_NACK = (0x5 << 5),
48 SWAUX_STATUS_I2C_DEFER = (0x6 << 5),
49 SWAUX_STATUS_TIMEOUT = (0x7 << 5),
52 int ps8640_init(uint8_t bus, uint8_t chip);
53 int ps8640_get_edid(uint8_t bus, uint8_t chip, struct edid *out);
54 void ps8640_backlight_enable(uint8_t bus, uint8_t chip);
56 #endif