soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / drivers / spi / spi_winbond.h
blobbdf669430681c7ea6070e730e70b9fc15e5fb81c
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /* Winbond specific function */
4 /* M25Pxx-specific commands */
5 #define CMD_W25_WREN 0x06 /* Write Enable */
6 #define CMD_W25_WRDI 0x04 /* Write Disable */
7 #define CMD_W25_RDSR 0x05 /* Read Status Register */
8 #define CMD_W25_WRSR 0x01 /* Write Status Register */
9 #define CMD_W25_RDSR2 0x35 /* Read Status2 Register */
10 #define CMD_W25_WRSR2 0x31 /* Write Status2 Register */
11 #define CMD_W25_READ 0x03 /* Read Data Bytes */
12 #define CMD_W25_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
13 #define CMD_W25_PP 0x02 /* Page Program */
14 #define CMD_W25_SE 0x20 /* Sector (4K) Erase */
15 #define CMD_W25_RDID 0x9f /* Read ID */
16 #define CMD_W25_BE 0xd8 /* Block (64K) Erase */
17 #define CMD_W25_CE 0xc7 /* Chip Erase */
18 #define CMD_W25_DP 0xb9 /* Deep Power-down */
19 #define CMD_W25_RES 0xab /* Release from DP and Read Signature */
20 #define CMD_VOLATILE_SREG_WREN 0x50 /* Write Enable for Volatile SREG */
22 /* tw: Maximum time to write a flash cell in milliseconds */
23 #define WINBOND_FLASH_TIMEOUT 30