1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/uart.h>
7 /* Calculate divisor. Do not floor but round to nearest integer. */
8 unsigned int uart_baudrate_divisor(unsigned int baudrate
,
9 unsigned int refclk
, unsigned int oversample
)
11 return (1 + (2 * refclk
) / (baudrate
* oversample
)) / 2;
14 #if !CONFIG(UART_OVERRIDE_INPUT_CLOCK_DIVIDER)
15 unsigned int uart_input_clock_divider(void)
17 /* Specify the default oversample rate for the UART.
19 * UARTs oversample the receive data. The UART's input clock first
20 * enters the baud-rate divider to generate the oversample clock. Then
21 * the UART typically divides the result by 16. The asynchronous
22 * receive data is synchronized with the oversample clock and when a
23 * start bit is detected the UART delays half a bit time using the
24 * oversample clock. Samples are then taken to verify the start bit and
25 * if present, samples are taken for the rest of the frame.
31 #if !CONFIG(UART_OVERRIDE_REFCLK)
32 unsigned int uart_platform_refclk(void)
34 /* Specify the default input clock frequency for the UART.
36 * The older UART's used an input clock frequency of 1.8432 MHz which
37 * with the 16x oversampling provided the maximum baud-rate of 115200.
38 * Specify this as maximum baud-rate multiplied by oversample so that
39 * it is obvious that the maximum baud rate is 115200 when divided by
40 * oversample clock. Also note that crystal on the board does not
41 * change when software selects another input clock divider.
47 /* Helper function to allow bitbanging an 8n1 UART. */
48 void uart_bitbang_tx_byte(unsigned char data
, void (*set_tx
)(int line_state
))
50 const int baud_rate
= get_uart_baudrate();
57 while (stopwatch_duration_usecs(&sw
) < MHz
/ baud_rate
)
60 /* 'i' counts the total bits sent at the end of the loop */
61 for (i
= 2; i
< 10; i
++) {
64 while (stopwatch_duration_usecs(&sw
) < i
* MHz
/ baud_rate
)
70 while (stopwatch_duration_usecs(&sw
) < i
* MHz
/ baud_rate
)