src/lib/spd_bin.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <cbfs.h>
   4 #include <console/console.h>
   5 #include <memory_info.h>
   6 #include <spd_bin.h>
   7 #include <string.h>
   8 #include <device/dram/ddr3.h>
   9
  10 void dump_spd_info(struct spd_block *blk)
  11 {
  12         u8 i;
  13
  14         for (i = 0; i < CONFIG_DIMM_MAX; i++)
  15                 if (blk->spd_array[i] != NULL && blk->spd_array[i][0] != 0) {
  16                         printk(BIOS_DEBUG, "SPD @ 0x%02X\n", blk->addr_map[i]);
  17                         print_spd_info(blk->spd_array[i]);
  18                 }
  19 }
  20
  21 const char * __weak mainboard_get_dram_part_num(void)
  22 {
  23         /* Default weak implementation, no need to override part number. */
  24         return NULL;
  25 }
  26
  27 static bool use_ddr4_params(int dram_type)
  28 {
  29         switch (dram_type) {
  30         case SPD_DRAM_DDR3:
  31         case SPD_DRAM_LPDDR3_INTEL:
  32                 return false;
  33         /* Below DDR type share the same attributes */
  34         case SPD_DRAM_LPDDR3_JEDEC:
  35         case SPD_DRAM_DDR4:
  36         case SPD_DRAM_DDR5:
  37         case SPD_DRAM_LPDDR5:
  38         case SPD_DRAM_LPDDR4:
  39         case SPD_DRAM_LPDDR4X:
  40                 return true;
  41         default:
  42                 printk(BIOS_NOTICE, "Defaulting to using DDR4 params. Please add dram_type check for %d to %s\n",
  43                         dram_type, __func__);
  44                 return true;
  45         }
  46 }
  47
  48 static const char *spd_get_module_type_string(int dram_type)
  49 {
  50         switch (dram_type) {
  51         case SPD_DRAM_DDR3:
  52                 return "DDR3";
  53         case SPD_DRAM_LPDDR3_INTEL:
  54         case SPD_DRAM_LPDDR3_JEDEC:
  55                 return "LPDDR3";
  56         case SPD_DRAM_DDR4:
  57                 return "DDR4";
  58         case SPD_DRAM_LPDDR4:
  59                 return "LPDDR4";
  60         case SPD_DRAM_LPDDR4X:
  61                 return "LPDDR4X";
  62         case SPD_DRAM_DDR5:
  63                 return "DDR5";
  64         case SPD_DRAM_LPDDR5:
  65                 return "LPDDR5";
  66         case SPD_DRAM_LPDDR5X:
  67                 return "LPDDR5X";
  68         }
  69         return "UNKNOWN";
  70 }
  71
  72 static int spd_get_banks(const uint8_t spd[], int dram_type)
  73 {
  74         static const int ddr3_banks[4] = { 8, 16, 32, 64 };
  75         static const int ddr4_banks[10] = { 4, 8, -1, -1, 8, 16, -1, -1, 16, 32 };
  76         int index = (spd[SPD_DENSITY_BANKS] >> 4) & 0xf;
  77
  78         if (use_ddr4_params(dram_type)) {
  79                 if (index >= ARRAY_SIZE(ddr4_banks))
  80                         return -1;
  81                 return ddr4_banks[index];
  82         } else {
  83                 if (index >= ARRAY_SIZE(ddr3_banks))
  84                         return -1;
  85                 return ddr3_banks[index];
  86         }
  87 }
  88
  89 static int spd_get_capmb(const uint8_t spd[])
  90 {
  91         static const int spd_capmb[13] = { 1, 2, 4, 8, 16, 32, 64,
  92                                            128, 48, 96, 12, 24, 72 };
  93         int index = spd[SPD_DENSITY_BANKS] & 0xf;
  94         if (index >= ARRAY_SIZE(spd_capmb))
  95                 return -1;
  96         return spd_capmb[index] * 256;
  97 }
  98
  99 static int spd_get_rows(const uint8_t spd[])
 100 {
 101         static const int spd_rows[7]  = { 12, 13, 14, 15, 16, 17, 18 };
 102         int index = (spd[SPD_ADDRESSING] >> 3) & 7;
 103         if (index >= ARRAY_SIZE(spd_rows))
 104                 return -1;
 105         return spd_rows[index];
 106 }
 107
 108 static int spd_get_cols(const uint8_t spd[])
 109 {
 110         static const int spd_cols[4]  = { 9, 10, 11, 12 };
 111         int index = spd[SPD_ADDRESSING] & 7;
 112         if (index >= ARRAY_SIZE(spd_cols))
 113                 return -1;
 114         return spd_cols[index];
 115 }
 116
 117 static int spd_get_ranks(const uint8_t spd[], int dram_type)
 118 {
 119         static const int spd_ranks[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
 120         int organ_offset = use_ddr4_params(dram_type) ? DDR4_ORGANIZATION
 121                                                       : DDR3_ORGANIZATION;
 122         int index = (spd[organ_offset] >> 3) & 7;
 123         if (index >= ARRAY_SIZE(spd_ranks))
 124                 return -1;
 125         return spd_ranks[index];
 126 }
 127
 128 static int spd_get_devw(const uint8_t spd[], int dram_type)
 129 {
 130         static const int spd_devw[4]  = { 4, 8, 16, 32 };
 131         int organ_offset = use_ddr4_params(dram_type) ? DDR4_ORGANIZATION
 132                                                       : DDR3_ORGANIZATION;
 133         int index = spd[organ_offset] & 7;
 134         if (index >= ARRAY_SIZE(spd_devw))
 135                 return -1;
 136         return spd_devw[index];
 137 }
 138
 139 static int spd_get_busw(const uint8_t spd[], int dram_type)
 140 {
 141         static const int spd_busw[4]  = { 8, 16, 32, 64 };
 142         int busw_offset = use_ddr4_params(dram_type) ? DDR4_BUS_DEV_WIDTH
 143                                                      : DDR3_BUS_DEV_WIDTH;
 144         int index = spd[busw_offset] & 7;
 145         if (index >= ARRAY_SIZE(spd_busw))
 146                 return -1;
 147         return spd_busw[index];
 148 }
 149
 150 static void spd_get_name(const uint8_t spd[], int type, const char **spd_name, size_t *len)
 151 {
 152         *spd_name = mainboard_get_dram_part_num();
 153         if (*spd_name != NULL) {
 154                 *len = strlen(*spd_name);
 155                 return;
 156         }
 157
 158         switch (type) {
 159         case SPD_DRAM_DDR3:
 160                 *spd_name = (const char *) &spd[DDR3_SPD_PART_OFF];
 161                 *len = DDR3_SPD_PART_LEN;
 162                 break;
 163         case SPD_DRAM_LPDDR3_INTEL:
 164                 *spd_name = (const char *) &spd[LPDDR3_SPD_PART_OFF];
 165                 *len = LPDDR3_SPD_PART_LEN;
 166                 break;
 167         /* LPDDR3, LPDDR4 and DDR4 have same part number offset and length */
 168         case SPD_DRAM_LPDDR3_JEDEC:
 169         case SPD_DRAM_DDR4:
 170         case SPD_DRAM_DDR5:
 171         case SPD_DRAM_LPDDR5:
 172         case SPD_DRAM_LPDDR4:
 173         case SPD_DRAM_LPDDR4X:
 174                 if (spd[DDR4_SPD_PART_OFF]) {
 175                         *spd_name = (const char *) &spd[DDR4_SPD_PART_OFF];
 176                         *len = DDR4_SPD_PART_LEN;
 177                 }
 178                 break;
 179         default:
 180                 *len = 0;
 181                 break;
 182         }
 183 }
 184
 185 void print_spd_info(uint8_t spd[])
 186 {
 187         const char *nameptr = NULL;
 188         size_t len;
 189         int type  = spd[SPD_DRAM_TYPE];
 190         int banks = spd_get_banks(spd, type);
 191         int capmb = spd_get_capmb(spd);
 192         int rows  = spd_get_rows(spd);
 193         int cols  = spd_get_cols(spd);
 194         int ranks = spd_get_ranks(spd, type);
 195         int devw  = spd_get_devw(spd, type);
 196         int busw  = spd_get_busw(spd, type);
 197
 198         /* Module type */
 199         printk(BIOS_INFO, "SPD: module type is %s\n",
 200                 spd_get_module_type_string(type));
 201         /* Module Part Number */
 202         spd_get_name(spd, type, &nameptr, &len);
 203         if (nameptr)
 204                 printk(BIOS_INFO, "SPD: module part number is %.*s\n", (int) len, nameptr);
 205
 206         printk(BIOS_INFO,
 207                 "SPD: banks %d, ranks %d, rows %d, columns %d, density %d Mb\n",
 208                 banks, ranks, rows, cols, capmb);
 209         printk(BIOS_INFO, "SPD: device width %d bits, bus width %d bits\n",
 210                 devw, busw);
 211
 212         if (capmb > 0 && busw > 0 && devw > 0 && ranks > 0) {
 213                 /* SIZE = DENSITY / 8 * BUS_WIDTH / SDRAM_WIDTH * RANKS */
 214                 printk(BIOS_INFO, "SPD: module size is %u MB (per channel)\n",
 215                         capmb / 8 * busw / devw * ranks);
 216         }
 217 }
 218
 219 uintptr_t spd_cbfs_map(u8 spd_index)
 220 {
 221         enum cbfs_type cbfs_type = CBFS_TYPE_SPD;
 222         size_t size;
 223
 224         void *map = cbfs_type_map("spd.bin", &size, &cbfs_type);
 225         if (!map || size < (spd_index + 1) * CONFIG_DIMM_SPD_SIZE)
 226                 return 0;
 227
 228         return (uintptr_t)map + spd_index * CONFIG_DIMM_SPD_SIZE;
 229 }
 230
 231 #if CONFIG_DIMM_SPD_SIZE == 128
 232 int read_ddr3_spd_from_cbfs(u8 *buf, int idx)
 233 {
 234         const int SPD_CRC_HI = 127;
 235         const int SPD_CRC_LO = 126;
 236
 237         char *spd_file;
 238         size_t spd_file_len = 0;
 239         size_t min_len = (idx + 1) * CONFIG_DIMM_SPD_SIZE;
 240
 241         spd_file = cbfs_map("spd.bin", &spd_file_len);
 242         if (!spd_file)
 243                 printk(BIOS_EMERG, "file [spd.bin] not found in CBFS");
 244         if (spd_file_len < min_len)
 245                 printk(BIOS_EMERG, "Missing SPD data.");
 246         if (!spd_file || spd_file_len < min_len)
 247                 return -1;
 248
 249         memcpy(buf, spd_file + (idx * CONFIG_DIMM_SPD_SIZE),
 250                 CONFIG_DIMM_SPD_SIZE);
 251         cbfs_unmap(spd_file);
 252
 253         u16 crc = spd_ddr3_calc_crc(buf, CONFIG_DIMM_SPD_SIZE);
 254
 255         if (((buf[SPD_CRC_LO] == 0) && (buf[SPD_CRC_HI] == 0))
 256                 || (buf[SPD_CRC_LO] != (crc & 0xff))
 257                 || (buf[SPD_CRC_HI] != (crc >> 8))) {
 258                 printk(BIOS_WARNING,
 259                         "SPD CRC %02x%02x is invalid, should be %04x\n",
 260                         buf[SPD_CRC_HI], buf[SPD_CRC_LO], crc);
 261                 buf[SPD_CRC_LO] = crc & 0xff;
 262                 buf[SPD_CRC_HI] = crc >> 8;
 263                 u16 i;
 264                 printk(BIOS_WARNING, "\nDisplay the SPD");
 265                 for (i = 0; i < CONFIG_DIMM_SPD_SIZE; i++) {
 266                         if ((i % 16) == 0x00)
 267                                 printk(BIOS_WARNING, "\n%02x:  ", i);
 268                         printk(BIOS_WARNING, "%02x ", buf[i]);
 269                 }
 270                 printk(BIOS_WARNING, "\n");
 271         }
 272         return 0;
 273 }
 274 #endif