soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP
[coreboot.git] / src / mainboard / system76 / tgl-u / variants / galp5 / overridetree.cb
blob1b4249c3f7af85d75ddce57ef73b50e13a74edb1
1 chip soc/intel/tigerlake
2 # Power limits
3 register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{
4 .tdp_pl1_override = 28,
5 .tdp_pl2_override = 51,
6 }"
7 register "power_limits_config[POWER_LIMITS_U_2_CORE]" = "{
8 .tdp_pl1_override = 28,
9 .tdp_pl2_override = 51,
12 # GPE configuration
13 register "pmc_gpe0_dw0" = "PMC_GPP_A"
14 register "pmc_gpe0_dw1" = "PMC_GPP_R"
15 register "pmc_gpe0_dw2" = "PMC_GPD"
17 device domain 0 on
18 subsystemid 0x1558 0x4018 inherit
20 device ref peg on
21 # PCIe PEG0 x4, Clock 0 (SSD1)
22 register "PcieClkSrcUsage[0]" = "0x40"
23 register "PcieClkSrcClkReq[0]" = "0"
24 chip soc/intel/common/block/pcie/rtd3
25 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD1_PWR_DN#
26 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0)" # GPP_H0_RTD3
27 register "srcclk_pin" = "0" # SSD1_CLKREQ#
28 device generic 0 on end
29 end
30 end
31 device ref north_xhci on # J_TYPEC2
32 register "UsbTcPortEn" = "1"
33 register "TcssXhciEn" = "1"
34 chip drivers/usb/acpi
35 device ref tcss_root_hub on
36 chip drivers/usb/acpi
37 register "desc" = ""USB3 J_TYPEC2""
38 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
39 register "group" = "ACPI_PLD_GROUP(1, 1)"
40 device ref tcss_usb3_port1 on end
41 end
42 end
43 end
44 end
45 device ref tbt_dma0 on # J_TYPEC2
46 chip drivers/intel/usb4/retimer
47 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)"
48 use tcss_usb3_port1 as dfp[0].typec_port
49 device generic 0 on end
50 end
51 end
53 device ref south_xhci on
54 # USB2
55 register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_2
56 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1
57 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_1
58 register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint
59 register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2
60 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera
61 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
62 # USB3
63 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB3_2
64 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 CH0
65 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB3_1
66 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 CH1
67 # ACPI
68 chip drivers/usb/acpi
69 device ref xhci_root_hub on
70 chip drivers/usb/acpi
71 register "desc" = ""USB2 J_USB3_2""
72 register "type" = "UPC_TYPE_A"
73 register "group" = "ACPI_PLD_GROUP(1, 2)"
74 device ref usb2_port1 on end
75 end
76 chip drivers/usb/acpi
77 register "desc" = ""USB2 J_TYPEC1""
78 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
79 register "group" = "ACPI_PLD_GROUP(2, 1)"
80 device ref usb2_port2 on end
81 end
82 chip drivers/usb/acpi
83 register "desc" = ""USB2 J_USB3_1""
84 register "type" = "UPC_TYPE_A"
85 register "group" = "ACPI_PLD_GROUP(2, 2)"
86 device ref usb2_port3 on end
87 end
88 chip drivers/usb/acpi
89 register "desc" = ""USB2 Fingerprint""
90 register "type" = "UPC_TYPE_INTERNAL"
91 device ref usb2_port5 on end
92 end
93 chip drivers/usb/acpi
94 register "desc" = ""USB2 J_TYPEC2""
95 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
96 register "group" = "ACPI_PLD_GROUP(1, 1)"
97 device ref usb2_port6 on end
98 end
99 chip drivers/usb/acpi
100 register "desc" = ""USB2 Camera""
101 register "type" = "UPC_TYPE_INTERNAL"
102 device ref usb2_port7 on end
104 chip drivers/usb/acpi
105 register "desc" = ""USB2 Bluetooth""
106 register "type" = "UPC_TYPE_INTERNAL"
107 device ref usb2_port10 on end
109 chip drivers/usb/acpi
110 register "desc" = ""USB3 J_USB3_2""
111 register "type" = "UPC_TYPE_A"
112 register "group" = "ACPI_PLD_GROUP(1, 2)"
113 device ref usb3_port1 on end
115 chip drivers/usb/acpi
116 register "desc" = ""USB3 J_TYPEC1 CH0""
117 register "type" = "UPC_TYPE_A"
118 register "group" = "ACPI_PLD_GROUP(2, 1)"
119 device ref usb3_port2 on end
121 chip drivers/usb/acpi
122 register "desc" = ""USB3 J_USB3_1""
123 register "type" = "UPC_TYPE_A"
124 register "group" = "ACPI_PLD_GROUP(2, 2)"
125 device ref usb3_port3 on end
127 chip drivers/usb/acpi
128 register "desc" = ""USB3 J_TYPEC1 CH1""
129 register "type" = "UPC_TYPE_A"
130 register "group" = "ACPI_PLD_GROUP(2, 1)"
131 device ref usb3_port4 on end
136 device ref i2c2 on
137 # TODO: Pantone ROM?
138 register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
140 device ref pcie_rp5 on
141 # PCIe root port #5 x4, Clock 2 (NVIDIA GPU)
142 register "PcieRpEnable[4]" = "1"
143 register "PcieRpLtrEnable[4]" = "1"
144 register "PcieClkSrcUsage[2]" = "4"
145 register "PcieClkSrcClkReq[2]" = "2"
146 chip soc/intel/common/block/pcie/rtd3
147 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_U5)" # DGPU_PWR_EN
148 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_U4)" # DGPU_RST#_PCH
149 register "enable_delay_ms" = "16"
150 register "enable_off_delay_ms" = "4"
151 register "reset_delay_ms" = "10"
152 register "reset_off_delay_ms" = "4"
153 register "srcclk_pin" = "2" # PEG_CLKREQ#
154 device generic 0 on end
157 device ref pcie_rp9 on
158 # PCIe root port #9 x1, Clock 3 (CARD)
159 register "PcieRpEnable[8]" = "1"
160 register "PcieRpLtrEnable[8]" = "1"
161 register "PcieClkSrcUsage[3]" = "8"
162 register "PcieClkSrcClkReq[3]" = "3"
164 device ref pcie_rp10 on
165 # PCIe root port #10 x1, Clock 4 (GLAN)
166 register "PcieRpEnable[9]" = "1"
167 register "PcieRpLtrEnable[9]" = "1"
168 register "PcieClkSrcUsage[4]" = "9"
169 register "PcieClkSrcClkReq[4]" = "4"
170 chip soc/intel/common/block/pcie/rtd3
171 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F9)" # GPIO_LAN_EN
172 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F7)" # GPIO_LANRTD3
173 register "srcclk_pin" = "4" # LAN_CLKREQ#
174 device generic 0 on end
177 device ref pcie_rp11 on
178 # PCIe root port #11 x1, Clock 1 (WLAN)
179 register "PcieRpEnable[10]" = "1"
180 register "PcieRpLtrEnable[10]" = "1"
181 register "PcieClkSrcUsage[1]" = "10"
182 register "PcieClkSrcClkReq[1]" = "1"
183 register "PcieRpSlotImplemented[10]" = "1"
185 device ref pmc hidden
186 # The pmc_mux chip driver is a placeholder for the
187 # PMC.MUX device in the ACPI hierarchy.
188 chip drivers/intel/pmc_mux
189 device generic 0 on
190 chip drivers/intel/pmc_mux/conn
191 # J_TYPEC2
192 use usb2_port6 as usb2_port
193 use tcss_usb3_port1 as usb3_port
194 # SBU & HSL follow CC
195 device generic 0 alias conn0 on end