soc/intel/elkhartlake: Make PCIe root port speed limit configurable

[coreboot.git] / configs / config.intel_galileo_gen2.fsp2.0

CONFIG_COLLECT_TIMESTAMPS=y
CONFIG_VENDOR_INTEL=y
CONFIG_BOARD_INTEL_GALILEO=y
# CONFIG_ENABLE_SD_TESTING is not set
CONFIG_BOOTBLOCK_NORMAL=y
CONFIG_ON_DEVICE_ROM_LOAD=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_SERIAL_921600=y