soc/intel/elkhartlake: Make PCIe root port speed limit configurable
[coreboot.git] / configs / config.protectli_vp4630_vp4650
blobaf50a7e12e6dc5b86551125d5f10f286d752ffa9
1 CONFIG_VENDOR_PROTECTLI=y
2 CONFIG_BOARD_PROTECTLI_VP4630_VP4650=y
3 CONFIG_TPM_MEASURED_BOOT=y
4 CONFIG_SMMSTORE_SIZE=0x40000
5 CONFIG_TPM2=y
6 CONFIG_POST_IO_PORT=0x80
7 CONFIG_PAYLOAD_EDK2=y
8 CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y
9 CONFIG_EDK2_BOOT_TIMEOUT=6
10 CONFIG_EDK2_FOLLOW_BGRT_SPEC=y
11 # CONFIG_EDK2_FULL_SCREEN_SETUP is not set
12 CONFIG_EDK2_SD_MMC_TIMEOUT=10
13 CONFIG_EDK2_SERIAL_SUPPORT=y