| commit | f2b9852a8e583bf7d485541152782f2a1ba0d49e | |
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | |
| Mon, 28 Nov 2022 10:37:17 +0000 (28 12:37 +0200) | ||
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | |
| Wed, 30 Nov 2022 04:05:55 +0000 (30 04:05 +0000) | ||
| tree | dcec312f9cf01b283785ce13f9730f516dffd957 | treesnapshot (tar.gz zip) |
| parent | 8b8ada6fdb3ebab672571c581eed3a7285589d83 | commitdiff |
nb/intel/e7505: Hook up PCI domain and CPU ops to devicetree
Change-Id: I70fb470b63ddd06f1d1e34deaea296d81e24f75f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70058
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Change-Id: I70fb470b63ddd06f1d1e34deaea296d81e24f75f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70058
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/mainboard/aopen/dxplplusu/devicetree.cb | diffblobblamehistory | |
| src/northbridge/intel/e7505/northbridge.c | diffblobblamehistory |